| Message ID | 1516207614-159721-2-git-send-email-john.garry@huawei.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On Thu, Jan 18, 2018 at 12:46:52AM +0800, John Garry wrote: > From: Xiaofei Tan <tanxiaofei@huawei.com> "dt-bindings: ..." is the preferred subject prefix. > > Add directly attached disk LED feature for v2 hw. > > Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> > Signed-off-by: John Garry <john.garry@huawei.com> > --- > Documentation/devicetree/bindings/scsi/hisilicon-sas.txt | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt > index b6a869f..df3bef7 100644 > --- a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt > +++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt > @@ -8,7 +8,10 @@ Main node required properties: > (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset > (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset > - sas-addr : array of 8 bytes for host SAS address > - - reg : Address and length of the SAS register > + - reg : Contains two regions. The first is the address and length of the SAS > + register. The second is the address and length of CPLD register for > + SGPIO control. The second is optional, and should be set only when > + we use a CPLD for directly attached disk LED control. Ah SGPIO, what nice memories I have of trying to support that after the chip was done. Seems you have the same fortune. :) What happens if you have a different CPLD or SGPIO control? Really this should probably be a separate node, but the kernel isn't setup for separate SGPIO drivers either. Reviewed-by: Rob Herring <robh@kernel.org> Rob
diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt index b6a869f..df3bef7 100644 --- a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt +++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt @@ -8,7 +8,10 @@ Main node required properties: (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset - sas-addr : array of 8 bytes for host SAS address - - reg : Address and length of the SAS register + - reg : Contains two regions. The first is the address and length of the SAS + register. The second is the address and length of CPLD register for + SGPIO control. The second is optional, and should be set only when + we use a CPLD for directly attached disk LED control. - hisilicon,sas-syscon: phandle of syscon used for sas control - ctrl-reset-reg : offset to controller reset register in ctrl reg - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg