diff mbox

[v1,6/8] x86/cpu: Add Cannonlake to Intel family

Message ID 1516352307-20123-7-git-send-email-rajneesh.bhardwaj@intel.com (mailing list archive)
State Changes Requested, archived
Delegated to: Andy Shevchenko
Headers show

Commit Message

Rajneesh Bhardwaj Jan. 19, 2018, 8:58 a.m. UTC
Add CPUID of Cannonlake (CNL) processors to Intel family list.

Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org

Suggested-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Megha Dey <megha.dey@linux.intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
---
 arch/x86/include/asm/intel-family.h | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Andy Shevchenko Jan. 26, 2018, 12:39 p.m. UTC | #1
On Fri, Jan 19, 2018 at 10:58 AM, Rajneesh Bhardwaj
<rajneesh.bhardwaj@intel.com> wrote:
> Add CPUID of Cannonlake (CNL) processors to Intel family list.
>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org

Thomas, can you Ack this patch?

> Suggested-by: Tony Luck <tony.luck@intel.com>
> Signed-off-by: Megha Dey <megha.dey@linux.intel.com>
> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
> ---
>  arch/x86/include/asm/intel-family.h | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> index 35a6bc4da8ad..cf090e584202 100644
> --- a/arch/x86/include/asm/intel-family.h
> +++ b/arch/x86/include/asm/intel-family.h
> @@ -10,6 +10,10 @@
>   *
>   * Things ending in "2" are usually because we have no better
>   * name for them.  There's no processor called "SILVERMONT2".
> + *
> + * While adding a new CPUID for a new microarchitecture, add a new
> + * group to keep logically sorted out in chronological order. Within
> + * that group keep the CPUID for the variants sorted by model number.
>   */
>
>  #define INTEL_FAM6_CORE_YONAH          0x0E
> @@ -49,6 +53,8 @@
>  #define INTEL_FAM6_KABYLAKE_MOBILE     0x8E
>  #define INTEL_FAM6_KABYLAKE_DESKTOP    0x9E
>
> +#define INTEL_FAM6_CANNONLAKE_MOBILE   0x66
> +
>  /* "Small Core" Processors (Atom) */
>
>  #define INTEL_FAM6_ATOM_PINEVIEW       0x1C
> --
> 2.7.4
>
Rajneesh Bhardwaj Jan. 31, 2018, 5:27 p.m. UTC | #2
On Fri, Jan 26, 2018 at 02:39:47PM +0200, Andy Shevchenko wrote:
> On Fri, Jan 19, 2018 at 10:58 AM, Rajneesh Bhardwaj
> <rajneesh.bhardwaj@intel.com> wrote:
> > Add CPUID of Cannonlake (CNL) processors to Intel family list.
> >
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > cc: Ingo Molnar <mingo@redhat.com>
> > Cc: "H. Peter Anvin" <hpa@zytor.com>
> > Cc: x86@kernel.org
> 
> Thomas, can you Ack this patch?

Sorry to bug you again, MAINTAINERS. The series depends on this patch for
enabling Cannonlake support. Requesting your ACK / Feedback for this one.

Thank you.

> 
> > Suggested-by: Tony Luck <tony.luck@intel.com>
> > Signed-off-by: Megha Dey <megha.dey@linux.intel.com>
> > Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
> > ---
> >  arch/x86/include/asm/intel-family.h | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> > index 35a6bc4da8ad..cf090e584202 100644
> > --- a/arch/x86/include/asm/intel-family.h
> > +++ b/arch/x86/include/asm/intel-family.h
> > @@ -10,6 +10,10 @@
> >   *
> >   * Things ending in "2" are usually because we have no better
> >   * name for them.  There's no processor called "SILVERMONT2".
> > + *
> > + * While adding a new CPUID for a new microarchitecture, add a new
> > + * group to keep logically sorted out in chronological order. Within
> > + * that group keep the CPUID for the variants sorted by model number.
> >   */
> >
> >  #define INTEL_FAM6_CORE_YONAH          0x0E
> > @@ -49,6 +53,8 @@
> >  #define INTEL_FAM6_KABYLAKE_MOBILE     0x8E
> >  #define INTEL_FAM6_KABYLAKE_DESKTOP    0x9E
> >
> > +#define INTEL_FAM6_CANNONLAKE_MOBILE   0x66
> > +
> >  /* "Small Core" Processors (Atom) */
> >
> >  #define INTEL_FAM6_ATOM_PINEVIEW       0x1C
> > --
> > 2.7.4
> >
> 
> -- 
> With Best Regards,
> Andy Shevchenko
Thomas Gleixner Jan. 31, 2018, 5:44 p.m. UTC | #3
On Wed, 31 Jan 2018, Rajneesh Bhardwaj wrote:

> On Fri, Jan 26, 2018 at 02:39:47PM +0200, Andy Shevchenko wrote:
> > On Fri, Jan 19, 2018 at 10:58 AM, Rajneesh Bhardwaj
> > <rajneesh.bhardwaj@intel.com> wrote:
> > > Add CPUID of Cannonlake (CNL) processors to Intel family list.
> > >
> > > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > > Cc: Thomas Gleixner <tglx@linutronix.de>
> > > cc: Ingo Molnar <mingo@redhat.com>
> > > Cc: "H. Peter Anvin" <hpa@zytor.com>
> > > Cc: x86@kernel.org
> > 
> > Thomas, can you Ack this patch?
> 
> Sorry to bug you again, MAINTAINERS. The series depends on this patch for
> enabling Cannonlake support. Requesting your ACK / Feedback for this one.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Andy Shevchenko Jan. 31, 2018, 6:31 p.m. UTC | #4
On Wed, Jan 31, 2018 at 7:44 PM, Thomas Gleixner <tglx@linutronix.de> wrote:

> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>

Thank you, Thomas!

Rajneesh, please, rebase the not-yet-applied patches on top of my
testing branch, add tags (Rafael's and Thomas') and resend.
diff mbox

Patch

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 35a6bc4da8ad..cf090e584202 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -10,6 +10,10 @@ 
  *
  * Things ending in "2" are usually because we have no better
  * name for them.  There's no processor called "SILVERMONT2".
+ *
+ * While adding a new CPUID for a new microarchitecture, add a new
+ * group to keep logically sorted out in chronological order. Within
+ * that group keep the CPUID for the variants sorted by model number.
  */
 
 #define INTEL_FAM6_CORE_YONAH		0x0E
@@ -49,6 +53,8 @@ 
 #define INTEL_FAM6_KABYLAKE_MOBILE	0x8E
 #define INTEL_FAM6_KABYLAKE_DESKTOP	0x9E
 
+#define INTEL_FAM6_CANNONLAKE_MOBILE	0x66
+
 /* "Small Core" Processors (Atom) */
 
 #define INTEL_FAM6_ATOM_PINEVIEW	0x1C