[v7,6/6] HAX Enable GuC Submission for CI

Message ID	1516325372-24448-6-git-send-email-yaodong.li@intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Jackie Li <yaodong.li@intel.com> To: intel-gfx@lists.freedesktop.org Date: Thu, 18 Jan 2018 17:29:32 -0800 Message-Id: <1516325372-24448-6-git-send-email-yaodong.li@intel.com> In-Reply-To: <1516325372-24448-1-git-send-email-yaodong.li@intel.com> References: <1516325372-24448-1-git-send-email-yaodong.li@intel.com> Subject: [Intel-gfx] [PATCH v7 6/6] HAX Enable GuC Submission for CI Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Message ID

1516325372-24448-6-git-send-email-yaodong.li@intel.com (mailing list archive)

State

New, archived

Headers

From: Jackie Li <yaodong.li@intel.com>
To: intel-gfx@lists.freedesktop.org
Date: Thu, 18 Jan 2018 17:29:32 -0800
Message-Id: <1516325372-24448-6-git-send-email-yaodong.li@intel.com>
In-Reply-To: <1516325372-24448-1-git-send-email-yaodong.li@intel.com>
References: <1516325372-24448-1-git-send-email-yaodong.li@intel.com>
Subject: [Intel-gfx] [PATCH v7 6/6] HAX Enable GuC Submission for CI
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Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Commit Message

Jackie Li Jan. 19, 2018, 1:29 a.m. UTC

Signed-off-by: Jackie Li <yaodong.li@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c    | 4 ++--
 drivers/gpu/drm/i915/i915_params.c     | 2 +-
 drivers/gpu/drm/i915/i915_params.h     | 2 +-
 drivers/gpu/drm/i915/intel_guc_wopcm.c | 6 ++++++
 4 files changed, 10 insertions(+), 4 deletions(-)

Comments

sagar.a.kamble@intel.com Feb. 1, 2018, 8:55 a.m. UTC | #1

On 1/19/2018 6:59 AM, Jackie Li wrote:
> Signed-off-by: Jackie Li <yaodong.li@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_gtt.c    | 4 ++--
>   drivers/gpu/drm/i915/i915_params.c     | 2 +-
>   drivers/gpu/drm/i915/i915_params.h     | 2 +-
>   drivers/gpu/drm/i915/intel_guc_wopcm.c | 6 ++++++
>   4 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 26dee5e..fed472a 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3561,7 +3561,7 @@ int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv)
>   
>   void i915_ggtt_enable_guc(struct drm_i915_private *i915)
>   {
> -	GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
> +//	GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
This is no more needed.
>   
>   	i915->ggtt.invalidate = guc_ggtt_invalidate;
>   
> @@ -3571,7 +3571,7 @@ void i915_ggtt_enable_guc(struct drm_i915_private *i915)
>   void i915_ggtt_disable_guc(struct drm_i915_private *i915)
>   {
>   	/* We should only be called after i915_ggtt_enable_guc() */
> -	GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
> +//	GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
>   
>   	i915->ggtt.invalidate = gen6_ggtt_invalidate;
>   
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 0b553a8..b33d364 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -152,7 +152,7 @@ i915_param_named_unsafe(edp_vswing, int, 0400,
>   i915_param_named_unsafe(enable_guc, int, 0400,
>   	"Enable GuC load for GuC submission and/or HuC load. "
>   	"Required functionality can be selected using bitmask values. "
> -	"(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
> +	"(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
>   
>   i915_param_named(guc_log_level, int, 0400,
>   	"GuC firmware logging level. Requires GuC to be loaded. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index c963603..53037b5 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,7 @@ struct drm_printer;
>   	param(int, disable_power_well, -1) \
>   	param(int, enable_ips, 1) \
>   	param(int, invert_brightness, 0) \
> -	param(int, enable_guc, 0) \
> +	param(int, enable_guc, -1) \
>   	param(int, guc_log_level, -1) \
>   	param(char *, guc_firmware_path, NULL) \
>   	param(char *, huc_firmware_path, NULL) \
> diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c b/drivers/gpu/drm/i915/intel_guc_wopcm.c
> index 236fc32..e972b7b 100644
> --- a/drivers/gpu/drm/i915/intel_guc_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
> @@ -154,6 +154,9 @@ int intel_guc_wopcm_init(struct intel_guc *guc, u32 guc_fw_size,
>   	u32 offset, size, top;
>   	int err;
>   
> +	DRM_DEBUG_DRIVER("guc_fw size %u, huc_fw_size %u\n", guc_fw_size,
> +			 huc_fw_size);
> +
>   	GEM_BUG_ON(guc->wopcm.flags & INTEL_GUC_WOPCM_VALID);
>   
>   	if (!guc_fw_size)
> @@ -213,6 +216,9 @@ void intel_guc_wopcm_init_hw(struct intel_guc *guc)
>   {
>   	u32 locked = guc_wopcm_locked(guc);
>   
> +	DRM_DEBUG_DRIVER("locked = %s, flags = %#x\n", yesno(locked),
> +			 guc->wopcm.flags);
> +
>   	GEM_BUG_ON(!(guc->wopcm.flags & INTEL_GUC_WOPCM_VALID));
>   
>   	/*

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 26dee5e..fed472a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3561,7 +3561,7 @@  int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv)
 
 void i915_ggtt_enable_guc(struct drm_i915_private *i915)
 {
-	GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
+//	GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
 
 	i915->ggtt.invalidate = guc_ggtt_invalidate;
 
@@ -3571,7 +3571,7 @@  void i915_ggtt_enable_guc(struct drm_i915_private *i915)
 void i915_ggtt_disable_guc(struct drm_i915_private *i915)
 {
 	/* We should only be called after i915_ggtt_enable_guc() */
-	GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
+//	GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
 
 	i915->ggtt.invalidate = gen6_ggtt_invalidate;
 
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 0b553a8..b33d364 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -152,7 +152,7 @@  i915_param_named_unsafe(edp_vswing, int, 0400,
 i915_param_named_unsafe(enable_guc, int, 0400,
 	"Enable GuC load for GuC submission and/or HuC load. "
 	"Required functionality can be selected using bitmask values. "
-	"(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
+	"(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
 
 i915_param_named(guc_log_level, int, 0400,
 	"GuC firmware logging level. Requires GuC to be loaded. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c963603..53037b5 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,7 @@  struct drm_printer;
 	param(int, disable_power_well, -1) \
 	param(int, enable_ips, 1) \
 	param(int, invert_brightness, 0) \
-	param(int, enable_guc, 0) \
+	param(int, enable_guc, -1) \
 	param(int, guc_log_level, -1) \
 	param(char *, guc_firmware_path, NULL) \
 	param(char *, huc_firmware_path, NULL) \
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c b/drivers/gpu/drm/i915/intel_guc_wopcm.c
index 236fc32..e972b7b 100644
--- a/drivers/gpu/drm/i915/intel_guc_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -154,6 +154,9 @@  int intel_guc_wopcm_init(struct intel_guc *guc, u32 guc_fw_size,
 	u32 offset, size, top;
 	int err;
 
+	DRM_DEBUG_DRIVER("guc_fw size %u, huc_fw_size %u\n", guc_fw_size,
+			 huc_fw_size);
+
 	GEM_BUG_ON(guc->wopcm.flags & INTEL_GUC_WOPCM_VALID);
 
 	if (!guc_fw_size)
@@ -213,6 +216,9 @@  void intel_guc_wopcm_init_hw(struct intel_guc *guc)
 {
 	u32 locked = guc_wopcm_locked(guc);
 
+	DRM_DEBUG_DRIVER("locked = %s, flags = %#x\n", yesno(locked),
+			 guc->wopcm.flags);
+
 	GEM_BUG_ON(!(guc->wopcm.flags & INTEL_GUC_WOPCM_VALID));
 
 	/*

[v7,6/6] HAX Enable GuC Submission for CI

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