| Message ID | 20180221161606.32247-3-jae.hyun.yoo@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Feb 21, 2018 at 08:16:00AM -0800, Jae Hyun Yoo wrote: > This commit adds a dt-bindings document of PECI adapter driver for Aspeed > AST24xx/25xx SoCs. Hi Jae It would be good to separate this into two. One binding document for a generic adaptor, with a generic PECI bus, and generic client devices. List all the properties you expect at the generic level. Then have an aspeed specific binding for those properties which are specific to the Aspeed adaptor. Andrew
On 2/21/2018 9:13 AM, Andrew Lunn wrote: > On Wed, Feb 21, 2018 at 08:16:00AM -0800, Jae Hyun Yoo wrote: >> This commit adds a dt-bindings document of PECI adapter driver for Aspeed >> AST24xx/25xx SoCs. > > Hi Jae > > It would be good to separate this into two. One binding document for a > generic adaptor, with a generic PECI bus, and generic client > devices. List all the properties you expect at the generic level. > > Then have an aspeed specific binding for those properties which are > specific to the Aspeed adaptor. > That makes sense. I'll add generic PECI bus/adapter/client and Aspeed specific documents as separated. > Andrew > > Thanks again for sharing your time to review it. I really appreciate it. BR, Jae
Hi! > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > --- > .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > new file mode 100644 > index 000000000000..8a86f346d550 > --- /dev/null > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > @@ -0,0 +1,73 @@ > +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. Are these SoCs x86-based? > +Required properties: > +- compatible > + "aspeed,ast2400-peci" or "aspeed,ast2500-peci" > + - aspeed,ast2400-peci: Aspeed AST2400 family PECI controller > + - aspeed,ast2500-peci: Aspeed AST2500 family PECI controller > + > +- reg > + Should contain PECI registers location and length. Other dts documents put it on one line, reg: Should contain ... > +- clock_frequency > + Should contain the operation frequency of PECI hardware module. > + 187500 ~ 24000000 specify this is Hz? > +- rd-sampling-point > + Read sampling point selection. The whole period of a bit time will be > + divided into 16 time frames. This value will determine which time frame > + this controller will sample PECI signal for data read back. Usually in > + the middle of a bit time is the best. English? "This value will determine when this controller"? > + 0 ~ 15 (default: 8) > + > +- cmd_timeout_ms > + Command timeout in units of ms. > + 1 ~ 60000 (default: 1000) > + > +Example: > + peci: peci@1e78b000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x1e78b000 0x60>; > + > + peci0: peci-bus@0 { > + compatible = "aspeed,ast2500-peci"; > + reg = <0x0 0x60>; > + #address-cells = <1>; > + #size-cells = <0>; > + interrupts = <15>; > + clocks = <&clk_clkin>; > + clock-frequency = <24000000>; > + msg-timing-nego = <1>; > + addr-timing-nego = <1>; > + rd-sampling-point = <8>; > + cmd-timeout-ms = <1000>; > + }; > + }; > \ No newline at end of file
On Tue, Mar 06, 2018 at 01:40:02PM +0100, Pavel Machek wrote: > Hi! > > > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > > --- > > .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ > > 1 file changed, 73 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt > > > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > new file mode 100644 > > index 000000000000..8a86f346d550 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > @@ -0,0 +1,73 @@ > > +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. > > Are these SoCs x86-based? ARM, as far as i can tell. If i get the architecture correct, these are BMC, Board Management Controllers, looking after the main x86 CPU, stopping it overheating, controlling the power supplies, remote management, etc. Andrew
On Tue 2018-03-06 13:54:16, Andrew Lunn wrote: > On Tue, Mar 06, 2018 at 01:40:02PM +0100, Pavel Machek wrote: > > Hi! > > > > > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > > > --- > > > .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ > > > 1 file changed, 73 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt > > > > > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > > new file mode 100644 > > > index 000000000000..8a86f346d550 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt > > > @@ -0,0 +1,73 @@ > > > +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. > > > > Are these SoCs x86-based? > > ARM, as far as i can tell. If i get the architecture correct, these > are BMC, Board Management Controllers, looking after the main x86 CPU, > stopping it overheating, controlling the power supplies, remote > management, etc. Ok, so with x86 machine, I get arm-based one for free. I get it. Is user able to run his own kernel on the arm system, or is it locked down, TiVo style? Pavel
On Tue, Mar 6, 2018 at 2:05 PM, Pavel Machek <pavel@ucw.cz> wrote: > On Tue 2018-03-06 13:54:16, Andrew Lunn wrote: >> On Tue, Mar 06, 2018 at 01:40:02PM +0100, Pavel Machek wrote: >> > Hi! >> > >> > > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> >> > > --- >> > > .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ >> > > 1 file changed, 73 insertions(+) >> > > create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt >> > > >> > > diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt >> > > new file mode 100644 >> > > index 000000000000..8a86f346d550 >> > > --- /dev/null >> > > +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt >> > > @@ -0,0 +1,73 @@ >> > > +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. >> > >> > Are these SoCs x86-based? >> >> ARM, as far as i can tell. If i get the architecture correct, these >> are BMC, Board Management Controllers, looking after the main x86 CPU, >> stopping it overheating, controlling the power supplies, remote >> management, etc. > > Ok, so with x86 machine, I get arm-based one for free. I get it. Is > user able to run his own kernel on the arm system, or is it locked > down, TiVo style? In the past, they were all locked down, the team submitting those patches in working on changing that. Have a look for OpenBMC. Arnd
Hi Pavel, Thanks for sharing your time on reviewing it. Please see my answers inline. -Jae On 3/6/2018 4:40 AM, Pavel Machek wrote: > Hi! > >> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> >> --- >> .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ >> 1 file changed, 73 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt >> >> diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt >> new file mode 100644 >> index 000000000000..8a86f346d550 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt >> @@ -0,0 +1,73 @@ >> +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. > > Are these SoCs x86-based? > Yes, these are ARM SoCs. Please see Andrew's answer as well. >> +Required properties: >> +- compatible >> + "aspeed,ast2400-peci" or "aspeed,ast2500-peci" >> + - aspeed,ast2400-peci: Aspeed AST2400 family PECI controller >> + - aspeed,ast2500-peci: Aspeed AST2500 family PECI controller >> + >> +- reg >> + Should contain PECI registers location and length. > > Other dts documents put it on one line, reg: Should contain ... > >> +- clock_frequency >> + Should contain the operation frequency of PECI hardware module. >> + 187500 ~ 24000000 > > specify this is Hz? > I'll add a description. Thanks! >> +- rd-sampling-point >> + Read sampling point selection. The whole period of a bit time will be >> + divided into 16 time frames. This value will determine which time frame >> + this controller will sample PECI signal for data read back. Usually in >> + the middle of a bit time is the best. > > English? "This value will determine when this controller"? > Could I change it like below?: "This value will determine in which time frame this controller samples PECI signal for data read back" >> + 0 ~ 15 (default: 8) >> + >> +- cmd_timeout_ms >> + Command timeout in units of ms. >> + 1 ~ 60000 (default: 1000) >> + >> +Example: >> + peci: peci@1e78b000 { >> + compatible = "simple-bus"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0x0 0x1e78b000 0x60>; >> + >> + peci0: peci-bus@0 { >> + compatible = "aspeed,ast2500-peci"; >> + reg = <0x0 0x60>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + interrupts = <15>; >> + clocks = <&clk_clkin>; >> + clock-frequency = <24000000>; >> + msg-timing-nego = <1>; >> + addr-timing-nego = <1>; >> + rd-sampling-point = <8>; >> + cmd-timeout-ms = <1000>; >> + }; >> + }; >> \ No newline at end of file >
Hi! > >Are these SoCs x86-based? > > Yes, these are ARM SoCs. Please see Andrew's answer as well. Understood, thanks. > >>+ Read sampling point selection. The whole period of a bit time will be > >>+ divided into 16 time frames. This value will determine which time frame > >>+ this controller will sample PECI signal for data read back. Usually in > >>+ the middle of a bit time is the best. > > > >English? "This value will determine when this controller"? > > > > Could I change it like below?: > > "This value will determine in which time frame this controller samples PECI > signal for data read back" I guess... I'm not native speaker, I guess this could be improved some more. Best regards, Pavel
About 03/07/2018 04:12PM in some time zone, Pavel Machek wrote: >Subject: Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: >Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs > >Hi! > >> >Are these SoCs x86-based? >> >> Yes, these are ARM SoCs. Please see Andrew's answer as well. > >Understood, thanks. > >> >>+ Read sampling point selection. The whole period of a bit time >will be >> >>+ divided into 16 time frames. This value will determine which >time frame >> >>+ this controller will sample PECI signal for data read back. >Usually in >> >>+ the middle of a bit time is the best. >> > >> >English? "This value will determine when this controller"? >> > >> >> Could I change it like below?: >> >> "This value will determine in which time frame this controller >samples PECI >> signal for data read back" > >I guess... I'm not native speaker, I guess this could be improved >some >more. > I agree this wording is still confusing. The problem is that the key subject, the time of the sampling, is in the descriptive clause "in which time frame". "This value will determine the time frame in which the controller will sample" or perhaps phrase it as saving a specific sample from the over-clock, or a phase of the clock. >Best regards, > Pavel > >-- >(english) http://www.livejournal.com/~pavelmachek >(cesky, pictures) >http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html > milton -- Speaking for myself not IBM.
Hi Milton, Thanks for sharing your time to review this patch. Please see my answer inline. Jae On 3/9/2018 3:41 PM, Milton Miller II wrote: > About 03/07/2018 04:12PM in some time zone, Pavel Machek wrote: >> Subject: Re: [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: >> Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs >> >> Hi! >> >>>> Are these SoCs x86-based? >>> >>> Yes, these are ARM SoCs. Please see Andrew's answer as well. >> >> Understood, thanks. >> >>>>> + Read sampling point selection. The whole period of a bit time >> will be >>>>> + divided into 16 time frames. This value will determine which >> time frame >>>>> + this controller will sample PECI signal for data read back. >> Usually in >>>>> + the middle of a bit time is the best. >>>> >>>> English? "This value will determine when this controller"? >>>> >>> >>> Could I change it like below?: >>> >>> "This value will determine in which time frame this controller >> samples PECI >>> signal for data read back" >> >> I guess... I'm not native speaker, I guess this could be improved >> some >> more. >> > > I agree this wording is still confusing. > > The problem is that the key subject, the time of the sampling, is in the descriptive clause "in which time frame". > > "This value will determine the time frame in which the controller will sample" > > or perhaps phrase it as saving a specific sample from the over-clock, or a phase of the clock. > Yes, that looks more better. I'll change the wording as you suggested. Thanks a lot! Jae >> Best regards, >> Pavel >> >> -- >> (english) http://www.livejournal.com/~pavelmachek >> (cesky, pictures) >> http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html >> > > milton > -- > Speaking for myself not IBM. >
diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.txt b/Documentation/devicetree/bindings/peci/peci-aspeed.txt new file mode 100644 index 000000000000..8a86f346d550 --- /dev/null +++ b/Documentation/devicetree/bindings/peci/peci-aspeed.txt @@ -0,0 +1,73 @@ +Device tree configuration for PECI buses on the AST24XX and AST25XX SoCs. + +Required properties: +- compatible + "aspeed,ast2400-peci" or "aspeed,ast2500-peci" + - aspeed,ast2400-peci: Aspeed AST2400 family PECI controller + - aspeed,ast2500-peci: Aspeed AST2500 family PECI controller + +- reg + Should contain PECI registers location and length. + +- #address-cells + Should be <1>. + +- #size-cells + Should be <0>. + +- interrupts + Should contain PECI interrupt. + +- clocks + Should contain clock source for PECI hardware module. Should reference + clkin clock. + +- clock_frequency + Should contain the operation frequency of PECI hardware module. + 187500 ~ 24000000 + +Optional properties: +- msg-timing-nego + Message timing negotiation period. This value will determine the period + of message timing negotiation to be issued by PECI controller. The unit + of the programmed value is four times of PECI clock period. + 0 ~ 255 (default: 1) + +- addr-timing-nego + Address timing negotiation period. This value will determine the period + of address timing negotiation to be issued by PECI controller. The unit + of the programmed value is four times of PECI clock period. + 0 ~ 255 (default: 1) + +- rd-sampling-point + Read sampling point selection. The whole period of a bit time will be + divided into 16 time frames. This value will determine which time frame + this controller will sample PECI signal for data read back. Usually in + the middle of a bit time is the best. + 0 ~ 15 (default: 8) + +- cmd_timeout_ms + Command timeout in units of ms. + 1 ~ 60000 (default: 1000) + +Example: + peci: peci@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + + peci0: peci-bus@0 { + compatible = "aspeed,ast2500-peci"; + reg = <0x0 0x60>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <15>; + clocks = <&clk_clkin>; + clock-frequency = <24000000>; + msg-timing-nego = <1>; + addr-timing-nego = <1>; + rd-sampling-point = <8>; + cmd-timeout-ms = <1000>; + }; + }; \ No newline at end of file
This commit adds a dt-bindings document of PECI adapter driver for Aspeed AST24xx/25xx SoCs. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> --- .../devicetree/bindings/peci/peci-aspeed.txt | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt