[v5,for-next,1/4] RDMA/hns: Support rq record doorbell for the user space

Message ID	1519634466-93056-2-git-send-email-liuyixian@huawei.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-rdma-owner@kernel.org> From: Yixian Liu <liuyixian@huawei.com> To: <jgg@ziepe.ca>, <leon@kernel.org>, <dledford@redhat.com> CC: <linux-rdma@vger.kernel.org> Subject: [PATCH v5 for-next 1/4] RDMA/hns: Support rq record doorbell for the user space Date: Mon, 26 Feb 2018 16:41:03 +0800 Message-ID: <1519634466-93056-2-git-send-email-liuyixian@huawei.com> In-Reply-To: <1519634466-93056-1-git-send-email-liuyixian@huawei.com> References: <1519634466-93056-1-git-send-email-liuyixian@huawei.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk

Hi Yixian, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on v4.16-rc3 next-20180226] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Yixian-Liu/Support-rq-and-cq-record-doorbell/20180226-184438 reproduce: # apt-get install sparse make ARCH=x86_64 allmodconfig make C=1 CF=-D__CHECK_ENDIAN__ sparse warnings: (new ones prefixed by >>) drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1227:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1232:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1233:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1233:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1233:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1238:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1238:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1238:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1239:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1239:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1239:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1309:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1330:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1361:39: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1375:39: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1379:36: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1396:38: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1422:36: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1433:38: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1480:33: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1604:38: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1609:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_cur_blk_addr @@ got unsignrestricted __le32 cqe_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1609:38: expected restricted __le32 cqe_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1609:38: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1611:33: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1613:9: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1622:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_nxt_blk_addr @@ got unsignrestricted __le32 cqe_nxt_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1622:38: expected restricted __le32 cqe_nxt_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1622:38: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1623:9: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1636:28: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_ba @@ got unsignrestricted __le32 cqe_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1636:28: expected restricted __le32 cqe_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1636:28: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1669:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1671:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1674:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1676:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1679:28: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got 2 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1679:28: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1679:28: got unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2273:36: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 qkey_xrcd @@ got unsigned intrestricted __le32 qkey_xrcd @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2273:36: expected restricted __le32 qkey_xrcd drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2273:36: got unsigned int const qkey >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2292:36: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rq_db_record_addr @@ got __le32 rq_db_record_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2292:36: expected restricted __le32 rq_db_record_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2292:36: got unsigned long long drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2604:36: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 qkey_xrcd @@ got unsigned intrestricted __le32 qkey_xrcd @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2604:36: expected restricted __le32 qkey_xrcd drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2604:36: got unsigned int const qkey drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2678:29: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 wqe_sge_ba @@ got unsignrestricted __le32 wqe_sge_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2678:29: expected restricted __le32 wqe_sge_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2678:29: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2741:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rq_cur_blk_addr @@ got unsignrestricted __le32 rq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2741:34: expected restricted __le32 rq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2741:34: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2754:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rq_nxt_blk_addr @@ got unsignrestricted __le32 rq_nxt_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2754:34: expected restricted __le32 rq_nxt_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2754:34: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2778:26: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 trrl_ba @@ got unsignrestricted __le32 trrl_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2778:26: expected restricted __le32 trrl_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2778:26: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2786:26: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 irrl_ba @@ got unsignrestricted __le32 irrl_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2786:26: expected restricted __le32 irrl_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2786:26: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2797:9: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2965:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 sq_cur_blk_addr @@ got unsignrestricted __le32 sq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2965:34: expected restricted __le32 sq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2965:34: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2976:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 sq_cur_sge_blk_addr @@ got sq_cur_sge_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2976:38: expected restricted __le32 sq_cur_sge_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2976:38: got unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2991:37: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rx_sq_cur_blk_addr @@ got unsignrestricted __le32 rx_sq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2991:37: expected restricted __le32 rx_sq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2991:37: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3391:28: sparse: incorrect type in assignment (different base types) @@ expected unsigned char rnr_retry @@ got d char rnr_retry @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3391:28: expected unsigned char rnr_retry drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3391:28: got restricted __le32 rq_rnr_timer drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3548:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3554:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3557:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3564:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3568:28: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got 2 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3568:28: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3568:28: got unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3579:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3610:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3647:15: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3681:15: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3737:17: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3756:30: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3855:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3874:23: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3922:13: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3925:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3928:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3932:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3935:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3938:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3942:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3945:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3945:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3945:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3945:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3945:17: left side has type unsigned int vim +2292 drivers/infiniband/hw/hns/hns_roce_hw_v2.c 2176 2177 static void modify_qp_reset_to_init(struct ib_qp *ibqp, 2178 const struct ib_qp_attr *attr, 2179 int attr_mask, 2180 struct hns_roce_v2_qp_context *context, 2181 struct hns_roce_v2_qp_context *qpc_mask) 2182 { 2183 struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); 2184 2185 /* 2186 * In v2 engine, software pass context and context mask to hardware 2187 * when modifying qp. If software need modify some fields in context, 2188 * we should set all bits of the relevant fields in context mask to 2189 * 0 at the same time, else set them to 0x1. 2190 */ 2191 roce_set_field(context->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M, 2192 V2_QPC_BYTE_4_TST_S, to_hr_qp_type(hr_qp->ibqp.qp_type)); 2193 roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M, 2194 V2_QPC_BYTE_4_TST_S, 0); 2195 2196 if (ibqp->qp_type == IB_QPT_GSI) 2197 roce_set_field(context->byte_4_sqpn_tst, 2198 V2_QPC_BYTE_4_SGE_SHIFT_M, 2199 V2_QPC_BYTE_4_SGE_SHIFT_S, 2200 ilog2((unsigned int)hr_qp->sge.sge_cnt)); 2201 else 2202 roce_set_field(context->byte_4_sqpn_tst, 2203 V2_QPC_BYTE_4_SGE_SHIFT_M, 2204 V2_QPC_BYTE_4_SGE_SHIFT_S, 2205 hr_qp->sq.max_gs > 2 ? 2206 ilog2((unsigned int)hr_qp->sge.sge_cnt) : 0); 2207 2208 roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_SGE_SHIFT_M, 2209 V2_QPC_BYTE_4_SGE_SHIFT_S, 0); 2210 2211 roce_set_field(context->byte_4_sqpn_tst, V2_QPC_BYTE_4_SQPN_M, 2212 V2_QPC_BYTE_4_SQPN_S, hr_qp->qpn); 2213 roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_SQPN_M, 2214 V2_QPC_BYTE_4_SQPN_S, 0); 2215 2216 roce_set_field(context->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M, 2217 V2_QPC_BYTE_16_PD_S, to_hr_pd(ibqp->pd)->pdn); 2218 roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M, 2219 V2_QPC_BYTE_16_PD_S, 0); 2220 2221 roce_set_field(context->byte_20_smac_sgid_idx, V2_QPC_BYTE_20_RQWS_M, 2222 V2_QPC_BYTE_20_RQWS_S, ilog2(hr_qp->rq.max_gs)); 2223 roce_set_field(qpc_mask->byte_20_smac_sgid_idx, V2_QPC_BYTE_20_RQWS_M, 2224 V2_QPC_BYTE_20_RQWS_S, 0); 2225 2226 roce_set_field(context->byte_20_smac_sgid_idx, 2227 V2_QPC_BYTE_20_SQ_SHIFT_M, V2_QPC_BYTE_20_SQ_SHIFT_S, 2228 ilog2((unsigned int)hr_qp->sq.wqe_cnt)); 2229 roce_set_field(qpc_mask->byte_20_smac_sgid_idx, 2230 V2_QPC_BYTE_20_SQ_SHIFT_M, V2_QPC_BYTE_20_SQ_SHIFT_S, 0); 2231 2232 roce_set_field(context->byte_20_smac_sgid_idx, 2233 V2_QPC_BYTE_20_RQ_SHIFT_M, V2_QPC_BYTE_20_RQ_SHIFT_S, 2234 ilog2((unsigned int)hr_qp->rq.wqe_cnt)); 2235 roce_set_field(qpc_mask->byte_20_smac_sgid_idx, 2236 V2_QPC_BYTE_20_RQ_SHIFT_M, V2_QPC_BYTE_20_RQ_SHIFT_S, 0); 2237 2238 /* No VLAN need to set 0xFFF */ 2239 roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_VLAN_IDX_M, 2240 V2_QPC_BYTE_24_VLAN_IDX_S, 0xfff); 2241 roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_VLAN_IDX_M, 2242 V2_QPC_BYTE_24_VLAN_IDX_S, 0); 2243 2244 /* 2245 * Set some fields in context to zero, Because the default values 2246 * of all fields in context are zero, we need not set them to 0 again. 2247 * but we should set the relevant fields of context mask to 0. 2248 */ 2249 roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_SQ_TX_ERR_S, 0); 2250 roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_SQ_RX_ERR_S, 0); 2251 roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_RQ_TX_ERR_S, 0); 2252 roce_set_bit(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_RQ_RX_ERR_S, 0); 2253 2254 roce_set_field(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_MAPID_M, 2255 V2_QPC_BYTE_60_MAPID_S, 0); 2256 2257 roce_set_bit(qpc_mask->byte_60_qpst_mapid, 2258 V2_QPC_BYTE_60_INNER_MAP_IND_S, 0); 2259 roce_set_bit(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_SQ_MAP_IND_S, 2260 0); 2261 roce_set_bit(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_RQ_MAP_IND_S, 2262 0); 2263 roce_set_bit(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_EXT_MAP_IND_S, 2264 0); 2265 roce_set_bit(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_SQ_RLS_IND_S, 2266 0); 2267 roce_set_bit(qpc_mask->byte_60_qpst_mapid, V2_QPC_BYTE_60_SQ_EXT_IND_S, 2268 0); 2269 roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_CNP_TX_FLAG_S, 0); 2270 roce_set_bit(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_CE_FLAG_S, 0); 2271 2272 if (attr_mask & IB_QP_QKEY) { 2273 context->qkey_xrcd = attr->qkey; 2274 qpc_mask->qkey_xrcd = 0; 2275 hr_qp->qkey = attr->qkey; 2276 } 2277 2278 if (hr_qp->rdb_en) { 2279 roce_set_bit(context->byte_68_rq_db, 2280 V2_QPC_BYTE_68_RQ_RECORD_EN_S, 1); 2281 roce_set_bit(qpc_mask->byte_68_rq_db, 2282 V2_QPC_BYTE_68_RQ_RECORD_EN_S, 0); 2283 } 2284 2285 roce_set_field(context->byte_68_rq_db, 2286 V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_M, 2287 V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_S, 2288 ((u32)hr_qp->rdb.dma) >> 1); 2289 roce_set_field(qpc_mask->byte_68_rq_db, 2290 V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_M, 2291 V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_S, 0); > 2292 context->rq_db_record_addr = hr_qp->rdb.dma >> 32; 2293 qpc_mask->rq_db_record_addr = 0; 2294 2295 roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S, 1); 2296 roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S, 0); 2297 2298 roce_set_field(context->byte_80_rnr_rx_cqn, V2_QPC_BYTE_80_RX_CQN_M, 2299 V2_QPC_BYTE_80_RX_CQN_S, to_hr_cq(ibqp->recv_cq)->cqn); 2300 roce_set_field(qpc_mask->byte_80_rnr_rx_cqn, V2_QPC_BYTE_80_RX_CQN_M, 2301 V2_QPC_BYTE_80_RX_CQN_S, 0); 2302 if (ibqp->srq) { 2303 roce_set_field(context->byte_76_srqn_op_en, 2304 V2_QPC_BYTE_76_SRQN_M, V2_QPC_BYTE_76_SRQN_S, 2305 to_hr_srq(ibqp->srq)->srqn); 2306 roce_set_field(qpc_mask->byte_76_srqn_op_en, 2307 V2_QPC_BYTE_76_SRQN_M, V2_QPC_BYTE_76_SRQN_S, 0); 2308 roce_set_bit(context->byte_76_srqn_op_en, 2309 V2_QPC_BYTE_76_SRQ_EN_S, 1); 2310 roce_set_bit(qpc_mask->byte_76_srqn_op_en, 2311 V2_QPC_BYTE_76_SRQ_EN_S, 0); 2312 } 2313 2314 roce_set_field(qpc_mask->byte_84_rq_ci_pi, 2315 V2_QPC_BYTE_84_RQ_PRODUCER_IDX_M, 2316 V2_QPC_BYTE_84_RQ_PRODUCER_IDX_S, 0); 2317 roce_set_field(qpc_mask->byte_84_rq_ci_pi, 2318 V2_QPC_BYTE_84_RQ_CONSUMER_IDX_M, 2319 V2_QPC_BYTE_84_RQ_CONSUMER_IDX_S, 0); 2320 2321 roce_set_field(qpc_mask->byte_92_srq_info, V2_QPC_BYTE_92_SRQ_INFO_M, 2322 V2_QPC_BYTE_92_SRQ_INFO_S, 0); 2323 2324 roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M, 2325 V2_QPC_BYTE_96_RX_REQ_MSN_S, 0); 2326 2327 roce_set_field(qpc_mask->byte_104_rq_sge, 2328 V2_QPC_BYTE_104_RQ_CUR_WQE_SGE_NUM_M, 2329 V2_QPC_BYTE_104_RQ_CUR_WQE_SGE_NUM_S, 0); 2330 2331 roce_set_bit(qpc_mask->byte_108_rx_reqepsn, 2332 V2_QPC_BYTE_108_RX_REQ_PSN_ERR_S, 0); 2333 roce_set_field(qpc_mask->byte_108_rx_reqepsn, 2334 V2_QPC_BYTE_108_RX_REQ_LAST_OPTYPE_M, 2335 V2_QPC_BYTE_108_RX_REQ_LAST_OPTYPE_S, 0); 2336 roce_set_bit(qpc_mask->byte_108_rx_reqepsn, 2337 V2_QPC_BYTE_108_RX_REQ_RNR_S, 0); 2338 2339 qpc_mask->rq_rnr_timer = 0; 2340 qpc_mask->rx_msg_len = 0; 2341 qpc_mask->rx_rkey_pkt_info = 0; 2342 qpc_mask->rx_va = 0; 2343 2344 roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_HEAD_MAX_M, 2345 V2_QPC_BYTE_132_TRRL_HEAD_MAX_S, 0); 2346 roce_set_field(qpc_mask->byte_132_trrl, V2_QPC_BYTE_132_TRRL_TAIL_MAX_M, 2347 V2_QPC_BYTE_132_TRRL_TAIL_MAX_S, 0); 2348 2349 roce_set_bit(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RSVD_RAQ_MAP_S, 0); 2350 roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RAQ_TRRL_HEAD_M, 2351 V2_QPC_BYTE_140_RAQ_TRRL_HEAD_S, 0); 2352 roce_set_field(qpc_mask->byte_140_raq, V2_QPC_BYTE_140_RAQ_TRRL_TAIL_M, 2353 V2_QPC_BYTE_140_RAQ_TRRL_TAIL_S, 0); 2354 2355 roce_set_field(qpc_mask->byte_144_raq, 2356 V2_QPC_BYTE_144_RAQ_RTY_INI_PSN_M, 2357 V2_QPC_BYTE_144_RAQ_RTY_INI_PSN_S, 0); 2358 roce_set_bit(qpc_mask->byte_144_raq, V2_QPC_BYTE_144_RAQ_RTY_INI_IND_S, 2359 0); 2360 roce_set_field(qpc_mask->byte_144_raq, V2_QPC_BYTE_144_RAQ_CREDIT_M, 2361 V2_QPC_BYTE_144_RAQ_CREDIT_S, 0); 2362 roce_set_bit(qpc_mask->byte_144_raq, V2_QPC_BYTE_144_RESP_RTY_FLG_S, 0); 2363 2364 roce_set_field(qpc_mask->byte_148_raq, V2_QPC_BYTE_148_RQ_MSN_M, 2365 V2_QPC_BYTE_148_RQ_MSN_S, 0); 2366 roce_set_field(qpc_mask->byte_148_raq, V2_QPC_BYTE_148_RAQ_SYNDROME_M, 2367 V2_QPC_BYTE_148_RAQ_SYNDROME_S, 0); 2368 2369 roce_set_field(qpc_mask->byte_152_raq, V2_QPC_BYTE_152_RAQ_PSN_M, 2370 V2_QPC_BYTE_152_RAQ_PSN_S, 0); 2371 roce_set_field(qpc_mask->byte_152_raq, 2372 V2_QPC_BYTE_152_RAQ_TRRL_RTY_HEAD_M, 2373 V2_QPC_BYTE_152_RAQ_TRRL_RTY_HEAD_S, 0); 2374 2375 roce_set_field(qpc_mask->byte_156_raq, V2_QPC_BYTE_156_RAQ_USE_PKTN_M, 2376 V2_QPC_BYTE_156_RAQ_USE_PKTN_S, 0); 2377 2378 roce_set_field(qpc_mask->byte_160_sq_ci_pi, 2379 V2_QPC_BYTE_160_SQ_PRODUCER_IDX_M, 2380 V2_QPC_BYTE_160_SQ_PRODUCER_IDX_S, 0); 2381 roce_set_field(qpc_mask->byte_160_sq_ci_pi, 2382 V2_QPC_BYTE_160_SQ_CONSUMER_IDX_M, 2383 V2_QPC_BYTE_160_SQ_CONSUMER_IDX_S, 0); 2384 2385 roce_set_field(context->byte_168_irrl_idx, 2386 V2_QPC_BYTE_168_SQ_SHIFT_BAK_M, 2387 V2_QPC_BYTE_168_SQ_SHIFT_BAK_S, 2388 ilog2((unsigned int)hr_qp->sq.wqe_cnt)); 2389 roce_set_field(qpc_mask->byte_168_irrl_idx, 2390 V2_QPC_BYTE_168_SQ_SHIFT_BAK_M, 2391 V2_QPC_BYTE_168_SQ_SHIFT_BAK_S, 0); 2392 2393 roce_set_bit(qpc_mask->byte_168_irrl_idx, 2394 V2_QPC_BYTE_168_MSG_RTY_LP_FLG_S, 0); 2395 roce_set_bit(qpc_mask->byte_168_irrl_idx, 2396 V2_QPC_BYTE_168_SQ_INVLD_FLG_S, 0); 2397 roce_set_field(qpc_mask->byte_168_irrl_idx, 2398 V2_QPC_BYTE_168_IRRL_IDX_LSB_M, 2399 V2_QPC_BYTE_168_IRRL_IDX_LSB_S, 0); 2400 2401 roce_set_field(context->byte_172_sq_psn, V2_QPC_BYTE_172_ACK_REQ_FREQ_M, 2402 V2_QPC_BYTE_172_ACK_REQ_FREQ_S, 4); 2403 roce_set_field(qpc_mask->byte_172_sq_psn, 2404 V2_QPC_BYTE_172_ACK_REQ_FREQ_M, 2405 V2_QPC_BYTE_172_ACK_REQ_FREQ_S, 0); 2406 2407 roce_set_bit(qpc_mask->byte_172_sq_psn, V2_QPC_BYTE_172_MSG_RNR_FLG_S, 2408 0); 2409 2410 roce_set_field(qpc_mask->byte_176_msg_pktn, 2411 V2_QPC_BYTE_176_MSG_USE_PKTN_M, 2412 V2_QPC_BYTE_176_MSG_USE_PKTN_S, 0); 2413 roce_set_field(qpc_mask->byte_176_msg_pktn, 2414 V2_QPC_BYTE_176_IRRL_HEAD_PRE_M, 2415 V2_QPC_BYTE_176_IRRL_HEAD_PRE_S, 0); 2416 2417 roce_set_field(qpc_mask->byte_184_irrl_idx, 2418 V2_QPC_BYTE_184_IRRL_IDX_MSB_M, 2419 V2_QPC_BYTE_184_IRRL_IDX_MSB_S, 0); 2420 2421 qpc_mask->cur_sge_offset = 0; 2422 2423 roce_set_field(qpc_mask->byte_192_ext_sge, 2424 V2_QPC_BYTE_192_CUR_SGE_IDX_M, 2425 V2_QPC_BYTE_192_CUR_SGE_IDX_S, 0); 2426 roce_set_field(qpc_mask->byte_192_ext_sge, 2427 V2_QPC_BYTE_192_EXT_SGE_NUM_LEFT_M, 2428 V2_QPC_BYTE_192_EXT_SGE_NUM_LEFT_S, 0); 2429 2430 roce_set_field(qpc_mask->byte_196_sq_psn, V2_QPC_BYTE_196_IRRL_HEAD_M, 2431 V2_QPC_BYTE_196_IRRL_HEAD_S, 0); 2432 2433 roce_set_field(qpc_mask->byte_200_sq_max, V2_QPC_BYTE_200_SQ_MAX_IDX_M, 2434 V2_QPC_BYTE_200_SQ_MAX_IDX_S, 0); 2435 roce_set_field(qpc_mask->byte_200_sq_max, 2436 V2_QPC_BYTE_200_LCL_OPERATED_CNT_M, 2437 V2_QPC_BYTE_200_LCL_OPERATED_CNT_S, 0); 2438 2439 roce_set_bit(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_PKT_RNR_FLG_S, 0); 2440 roce_set_bit(qpc_mask->byte_208_irrl, V2_QPC_BYTE_208_PKT_RTY_FLG_S, 0); 2441 2442 roce_set_field(qpc_mask->byte_212_lsn, V2_QPC_BYTE_212_CHECK_FLG_M, 2443 V2_QPC_BYTE_212_CHECK_FLG_S, 0); 2444 2445 qpc_mask->sq_timer = 0; 2446 2447 roce_set_field(qpc_mask->byte_220_retry_psn_msn, 2448 V2_QPC_BYTE_220_RETRY_MSG_MSN_M, 2449 V2_QPC_BYTE_220_RETRY_MSG_MSN_S, 0); 2450 roce_set_field(qpc_mask->byte_232_irrl_sge, 2451 V2_QPC_BYTE_232_IRRL_SGE_IDX_M, 2452 V2_QPC_BYTE_232_IRRL_SGE_IDX_S, 0); 2453 2454 qpc_mask->irrl_cur_sge_offset = 0; 2455 2456 roce_set_field(qpc_mask->byte_240_irrl_tail, 2457 V2_QPC_BYTE_240_IRRL_TAIL_REAL_M, 2458 V2_QPC_BYTE_240_IRRL_TAIL_REAL_S, 0); 2459 roce_set_field(qpc_mask->byte_240_irrl_tail, 2460 V2_QPC_BYTE_240_IRRL_TAIL_RD_M, 2461 V2_QPC_BYTE_240_IRRL_TAIL_RD_S, 0); 2462 roce_set_field(qpc_mask->byte_240_irrl_tail, 2463 V2_QPC_BYTE_240_RX_ACK_MSN_M, 2464 V2_QPC_BYTE_240_RX_ACK_MSN_S, 0); 2465 2466 roce_set_field(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_IRRL_PSN_M, 2467 V2_QPC_BYTE_248_IRRL_PSN_S, 0); 2468 roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_ACK_PSN_ERR_S, 2469 0); 2470 roce_set_field(qpc_mask->byte_248_ack_psn, 2471 V2_QPC_BYTE_248_ACK_LAST_OPTYPE_M, 2472 V2_QPC_BYTE_248_ACK_LAST_OPTYPE_S, 0); 2473 roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_IRRL_PSN_VLD_S, 2474 0); 2475 roce_set_bit(qpc_mask->byte_248_ack_psn, 2476 V2_QPC_BYTE_248_RNR_RETRY_FLAG_S, 0); 2477 roce_set_bit(qpc_mask->byte_248_ack_psn, V2_QPC_BYTE_248_CQ_ERR_IND_S, 2478 0); 2479 2480 hr_qp->access_flags = attr->qp_access_flags; 2481 hr_qp->pkey_index = attr->pkey_index; 2482 roce_set_field(context->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M, 2483 V2_QPC_BYTE_252_TX_CQN_S, to_hr_cq(ibqp->send_cq)->cqn); 2484 roce_set_field(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M, 2485 V2_QPC_BYTE_252_TX_CQN_S, 0); 2486 2487 roce_set_field(qpc_mask->byte_252_err_txcqn, V2_QPC_BYTE_252_ERR_TYPE_M, 2488 V2_QPC_BYTE_252_ERR_TYPE_S, 0); 2489 2490 roce_set_field(qpc_mask->byte_256_sqflush_rqcqe, 2491 V2_QPC_BYTE_256_RQ_CQE_IDX_M, 2492 V2_QPC_BYTE_256_RQ_CQE_IDX_S, 0); 2493 roce_set_field(qpc_mask->byte_256_sqflush_rqcqe, 2494 V2_QPC_BYTE_256_SQ_FLUSH_IDX_M, 2495 V2_QPC_BYTE_256_SQ_FLUSH_IDX_S, 0); 2496 } 2497 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

diff --git a/drivers/infiniband/hw/hns/Makefile b/drivers/infiniband/hw/hns/Makefile index 97bf2cd..cf03404 100644 --- a/drivers/infiniband/hw/hns/Makefile +++ b/drivers/infiniband/hw/hns/Makefile @@ -7,7 +7,7 @@ ccflags-y := -Idrivers/net/ethernet/hisilicon/hns3 obj-$(CONFIG_INFINIBAND_HNS) += hns-roce.o hns-roce-objs := hns_roce_main.o hns_roce_cmd.o hns_roce_pd.o \ hns_roce_ah.o hns_roce_hem.o hns_roce_mr.o hns_roce_qp.o \ - hns_roce_cq.o hns_roce_alloc.o + hns_roce_cq.o hns_roce_alloc.o hns_roce_db.o obj-$(CONFIG_INFINIBAND_HNS_HIP06) += hns-roce-hw-v1.o hns-roce-hw-v1-objs := hns_roce_hw_v1.o obj-$(CONFIG_INFINIBAND_HNS_HIP08) += hns-roce-hw-v2.o diff --git a/drivers/infiniband/hw/hns/hns_roce_db.c b/drivers/infiniband/hw/hns/hns_roce_db.c new file mode 100644 index 0000000..657b099 --- /dev/null +++ b/drivers/infiniband/hw/hns/hns_roce_db.c @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause */ +/* + * Copyright (c) 2017 Hisilicon Limited. + * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. + * + * This software is available to you under a choice of one of two + * licenses. You may choose to be licensed under the terms of the GNU + * General Public License (GPL) Version 2, available from the file + * COPYING in the main directory of this source tree, or the + * OpenIB.org BSD license below: + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include <linux/platform_device.h> +#include <rdma/ib_umem.h> +#include "hns_roce_device.h" + +int hns_roce_db_map_user(struct hns_roce_ucontext *context, unsigned long virt, + struct hns_roce_db *db) +{ + struct hns_roce_user_db_page *page; + int ret = 0; + + mutex_lock(&context->page_mutex); + + list_for_each_entry(page, &context->page_list, list) + if (page->user_virt == (virt & PAGE_MASK)) + goto found; + + page = kmalloc(sizeof(*page), GFP_KERNEL); + if (!page) { + ret = -ENOMEM; + goto out; + } + + page->user_virt = (virt & PAGE_MASK); + page->refcount_t = 0; + page->umem = ib_umem_get(&context->ibucontext, virt & PAGE_MASK, + PAGE_SIZE, 0, 0); + if (IS_ERR(page->umem)) { + ret = PTR_ERR(page->umem); + kfree(page); + goto out; + } + + list_add(&page->list, &context->page_list); + +found: + db->dma = sg_dma_address(page->umem->sg_head.sgl) + + (virt & ~PAGE_MASK); + db->u.user_page = page; + ++page->refcount_t; + +out: + mutex_unlock(&context->page_mutex); + + return ret; +} +EXPORT_SYMBOL(hns_roce_db_map_user); + +void hns_roce_db_unmap_user(struct hns_roce_ucontext *context, + struct hns_roce_db *db) +{ + mutex_lock(&context->page_mutex); + + if (!--db->u.user_page->refcount_t) { + list_del(&db->u.user_page->list); + ib_umem_release(db->u.user_page->umem); + kfree(db->u.user_page); + } + + mutex_unlock(&context->page_mutex); +} +EXPORT_SYMBOL(hns_roce_db_unmap_user); diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index 165a09b..a6f01a1 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -105,6 +105,10 @@ #define PAGES_SHIFT_24 24 #define PAGES_SHIFT_32 32 +enum { + HNS_ROCE_SUPPORT_RQ_RECORD_DB = 1 << 0, +}; + enum hns_roce_qp_state { HNS_ROCE_QP_STATE_RST, HNS_ROCE_QP_STATE_INIT, @@ -178,7 +182,8 @@ enum { enum { HNS_ROCE_CAP_FLAG_REREG_MR = BIT(0), HNS_ROCE_CAP_FLAG_ROCE_V1_V2 = BIT(1), - HNS_ROCE_CAP_FLAG_RQ_INLINE = BIT(2) + HNS_ROCE_CAP_FLAG_RQ_INLINE = BIT(2), + HNS_ROCE_CAP_FLAG_RECORD_DB = BIT(3) }; enum hns_roce_mtt_type { @@ -186,6 +191,10 @@ enum hns_roce_mtt_type { MTT_TYPE_CQE, }; +enum { + HNS_ROCE_DB_PER_PAGE = PAGE_SIZE / 4 +}; + #define HNS_ROCE_CMD_SUCCESS 1 #define HNS_ROCE_PORT_DOWN 0 @@ -203,6 +212,8 @@ struct hns_roce_uar { struct hns_roce_ucontext { struct ib_ucontext ibucontext; struct hns_roce_uar uar; + struct list_head page_list; + struct mutex page_mutex; }; struct hns_roce_pd { @@ -335,6 +346,33 @@ struct hns_roce_buf { int page_shift; }; +struct hns_roce_db_pgdir { + struct list_head list; + DECLARE_BITMAP(order0, HNS_ROCE_DB_PER_PAGE); + DECLARE_BITMAP(order1, HNS_ROCE_DB_PER_PAGE / 2); + unsigned long *bits[2]; + u32 *page; + dma_addr_t db_dma; +}; + +struct hns_roce_user_db_page { + struct list_head list; + struct ib_umem *umem; + unsigned long user_virt; + int refcount_t; +}; + +struct hns_roce_db { + u32 *db_record; + union { + struct hns_roce_db_pgdir *pgdir; + struct hns_roce_user_db_page *user_page; + } u; + dma_addr_t dma; + int index; + int order; +}; + struct hns_roce_cq_buf { struct hns_roce_buf hr_buf; struct hns_roce_mtt hr_mtt; @@ -466,6 +504,8 @@ struct hns_roce_qp { struct ib_qp ibqp; struct hns_roce_buf hr_buf; struct hns_roce_wq rq; + struct hns_roce_db rdb; + u8 rdb_en; u32 doorbell_qpn; __le32 sq_signal_bits; u32 sq_next_wqe; @@ -930,6 +970,10 @@ struct ib_cq *hns_roce_ib_create_cq(struct ib_device *ib_dev, int hns_roce_ib_destroy_cq(struct ib_cq *ib_cq); void hns_roce_free_cq(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq); +int hns_roce_db_map_user(struct hns_roce_ucontext *context, unsigned long virt, + struct hns_roce_db *db); +void hns_roce_db_unmap_user(struct hns_roce_ucontext *context, + struct hns_roce_db *db); void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn); void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type); void hns_roce_qp_event(struct hns_roce_dev *hr_dev, u32 qpn, int event_type); diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index 016bca1..2157591 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -1168,7 +1168,8 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev) caps->flags = HNS_ROCE_CAP_FLAG_REREG_MR | HNS_ROCE_CAP_FLAG_ROCE_V1_V2 | - HNS_ROCE_CAP_FLAG_RQ_INLINE; + HNS_ROCE_CAP_FLAG_RQ_INLINE | + HNS_ROCE_CAP_FLAG_RECORD_DB; caps->pkey_table_len[0] = 1; caps->gid_table_len[0] = HNS_ROCE_V2_GID_INDEX_NUM; caps->ceqe_depth = HNS_ROCE_V2_COMP_EQE_NUM; @@ -2274,6 +2275,23 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp, hr_qp->qkey = attr->qkey; } + if (hr_qp->rdb_en) { + roce_set_bit(context->byte_68_rq_db, + V2_QPC_BYTE_68_RQ_RECORD_EN_S, 1); + roce_set_bit(qpc_mask->byte_68_rq_db, + V2_QPC_BYTE_68_RQ_RECORD_EN_S, 0); + } + + roce_set_field(context->byte_68_rq_db, + V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_M, + V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_S, + ((u32)hr_qp->rdb.dma) >> 1); + roce_set_field(qpc_mask->byte_68_rq_db, + V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_M, + V2_QPC_BYTE_68_RQ_DB_RECORD_ADDR_S, 0); + context->rq_db_record_addr = hr_qp->rdb.dma >> 32; + qpc_mask->rq_db_record_addr = 0; + roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S, 1); roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S, 0); @@ -3211,6 +3229,8 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp, hr_qp->sq.tail = 0; hr_qp->sq_next_wqe = 0; hr_qp->next_sge = 0; + if (hr_qp->rq.wqe_cnt) + *hr_qp->rdb.db_record = 0; } out: @@ -3437,6 +3457,10 @@ static int hns_roce_v2_destroy_qp_common(struct hns_roce_dev *hr_dev, hns_roce_mtt_cleanup(hr_dev, &hr_qp->mtt); if (is_user) { + if (hr_qp->rq.wqe_cnt && (hr_qp->rdb_en == 1)) + hns_roce_db_unmap_user( + to_hr_ucontext(hr_qp->ibqp.uobject->context), + &hr_qp->rdb); ib_umem_release(hr_qp->umem); } else { kfree(hr_qp->sq.wrid); diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index 8255bb9..d6c9c57 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -351,6 +351,11 @@ static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev, if (ret) goto error_fail_uar_alloc; + if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) { + INIT_LIST_HEAD(&context->page_list); + mutex_init(&context->page_mutex); + } + ret = ib_copy_to_udata(udata, &resp, sizeof(resp)); if (ret) goto error_fail_copy_to_udata; diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c index 088973a..92597e2 100644 --- a/drivers/infiniband/hw/hns/hns_roce_qp.c +++ b/drivers/infiniband/hw/hns/hns_roce_qp.c @@ -489,6 +489,15 @@ static int hns_roce_set_kernel_sq_size(struct hns_roce_dev *hr_dev, return 0; } +static int hns_roce_qp_has_rq(struct ib_qp_init_attr *attr) +{ + if (attr->qp_type == IB_QPT_XRC_INI || + attr->qp_type == IB_QPT_XRC_TGT || attr->srq) + return 0; + + return 1; +} + static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, struct ib_pd *ib_pd, struct ib_qp_init_attr *init_attr, @@ -497,6 +506,7 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, { struct device *dev = hr_dev->dev; struct hns_roce_ib_create_qp ucmd; + struct hns_roce_ib_create_qp_resp resp; unsigned long qpn = 0; int ret = 0; u32 page_shift; @@ -602,6 +612,18 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, dev_err(dev, "hns_roce_ib_umem_write_mtt error for create qp\n"); goto err_mtt; } + + if ((hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) && + (udata->outlen == sizeof(resp)) && + hns_roce_qp_has_rq(init_attr)) { + ret = hns_roce_db_map_user( + to_hr_ucontext(ib_pd->uobject->context), + ucmd.db_addr, &hr_qp->rdb); + if (ret) { + dev_err(dev, "rp record doorbell map failed!\n"); + goto err_mtt; + } + } } else { if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { @@ -698,17 +720,44 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, else hr_qp->doorbell_qpn = cpu_to_le64(hr_qp->qpn); + if (ib_pd->uobject && (udata->outlen == sizeof(resp)) && + (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB)) { + + /* indicate kernel supports record db */ + resp.cap_flags |= HNS_ROCE_SUPPORT_RQ_RECORD_DB; + ret = ib_copy_to_udata(udata, &resp, sizeof(resp)); + if (ret) + goto err_qp; + + hr_qp->rdb_en = 1; + } hr_qp->event = hns_roce_ib_qp_event; return 0; +err_qp: + if (init_attr->qp_type == IB_QPT_GSI && + hr_dev->hw_rev == HNS_ROCE_HW_VER1) + hns_roce_qp_remove(hr_dev, hr_qp); + else + hns_roce_qp_free(hr_dev, hr_qp); + err_qpn: if (!sqpn) hns_roce_release_range_qp(hr_dev, qpn, 1); err_wrid: - kfree(hr_qp->sq.wrid); - kfree(hr_qp->rq.wrid); + if (ib_pd->uobject) { + if ((hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) && + (udata->outlen == sizeof(resp)) && + hns_roce_qp_has_rq(init_attr)) + hns_roce_db_unmap_user( + to_hr_ucontext(ib_pd->uobject->context), + &hr_qp->rdb); + } else { + kfree(hr_qp->sq.wrid); + kfree(hr_qp->rq.wrid); + } err_mtt: hns_roce_mtt_cleanup(hr_dev, &hr_qp->mtt); diff --git a/include/uapi/rdma/hns-abi.h b/include/uapi/rdma/hns-abi.h index a9c03b0..6150c19 100644 --- a/include/uapi/rdma/hns-abi.h +++ b/include/uapi/rdma/hns-abi.h @@ -49,7 +49,12 @@ struct hns_roce_ib_create_qp { __u8 reserved[5]; }; +struct hns_roce_ib_create_qp_resp { + __u64 cap_flags; +}; + struct hns_roce_ib_alloc_ucontext_resp { __u32 qp_tab_size; + __u32 reserved; }; #endif /* HNS_ABI_USER_H */

[v5,for-next,1/4] RDMA/hns: Support rq record doorbell for the user space

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