Message ID | 20180301180703.24191-1-michel.thierry@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 3/1/2018 10:07 AM, Michel Thierry wrote: > So change timeout_ts and use time_after64 in gen11_gt_engine_intr. > I just read Chris' original comment about this, so ignore the patch, "The squash should be made, but time_after64 is no more correct since the native 32b/64b wrapped arithmetic is accurate. So what can be done here is remove the casts and use time_after32() if we truly cared." -Michel > Fixes: 51951ae7ed00 ("drm/i915/icl: Interrupt handling"). > Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (long time ago) > Signed-off-by: Michel Thierry <michel.thierry@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Oscar Mateo <oscar.mateo@intel.com> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_irq.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index eacb08034776..45f10db757e2 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2813,7 +2813,7 @@ gen11_gt_engine_intr(struct drm_i915_private * const i915, > const unsigned int bank, const unsigned int bit) > { > void __iomem * const regs = i915->regs; > - u32 timeout_ts; > + u64 timeout_ts; > u32 ident; > > raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); > @@ -2826,7 +2826,7 @@ gen11_gt_engine_intr(struct drm_i915_private * const i915, > do { > ident = raw_reg_read(regs, GEN11_INTR_IDENTITY_REG(bank)); > } while (!(ident & GEN11_INTR_DATA_VALID) && > - !time_after32(local_clock() >> 10, timeout_ts)); > + !time_after64(local_clock() >> 10, timeout_ts)); > > if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) { > DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n", >
Quoting Michel Thierry (2018-03-01 18:07:03)
> So change timeout_ts and use time_after64 in gen11_gt_engine_intr.
We only need u32 for the duration.
-Chris
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index eacb08034776..45f10db757e2 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2813,7 +2813,7 @@ gen11_gt_engine_intr(struct drm_i915_private * const i915, const unsigned int bank, const unsigned int bit) { void __iomem * const regs = i915->regs; - u32 timeout_ts; + u64 timeout_ts; u32 ident; raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); @@ -2826,7 +2826,7 @@ gen11_gt_engine_intr(struct drm_i915_private * const i915, do { ident = raw_reg_read(regs, GEN11_INTR_IDENTITY_REG(bank)); } while (!(ident & GEN11_INTR_DATA_VALID) && - !time_after32(local_clock() >> 10, timeout_ts)); + !time_after64(local_clock() >> 10, timeout_ts)); if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) { DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
So change timeout_ts and use time_after64 in gen11_gt_engine_intr. Fixes: 51951ae7ed00 ("drm/i915/icl: Interrupt handling"). Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (long time ago) Signed-off-by: Michel Thierry <michel.thierry@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/i915_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)