| Message ID | 1520847416-22732-1-git-send-email-ping.bai@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Mar 12, 2018 at 05:36:55PM +0800, Bai Ping wrote: > Add pinctrl binding doc update for imx6sll. > > Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Shawn Guo <shawnguo@kernel.org>
> -----Original Message----- > From: Jacky Bai > Sent: Monday, March 12, 2018 5:37 PM > To: linus.walleij@linaro.org; robh+dt@kernel.org; shawnguo@kernel.org; > kernel@pengutronix.de > Cc: Fabio Estevam <fabio.estevam@nxp.com>; linux-arm- > kernel@lists.infradead.org; A.s. Dong <aisheng.dong@nxp.com>; dl-linux- > imx <linux-imx@nxp.com>; jacky.baip@gmail.com > Subject: [PATCH v5 1/2] dt-bindings: imx: update pinctrl doc for imx6sll > > Add pinctrl binding doc update for imx6sll. > > Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Dong Aisheng > --- > changes v2-v3: > - add generic config binding > > change v3->v4: > - add SION bit define > - fix typo > - move the pin header file to dts patch. > > change v4->5: > - drop generic config, use the old fsl pin config style > --- > .../bindings/pinctrl/fsl,imx6sll-pinctrl.txt | 40 ++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6sll- > pinctrl.txt > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt > b/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt > new file mode 100644 > index 0000000..2e897a5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt > @@ -0,0 +1,40 @@ > +* Freescale i.MX6 SLL IOMUX Controller > + > +Please refer to fsl,imx-pinctrl.txt in this directory for common > +binding part and usage. > + > +Required properties: > +- compatible: "fsl,imx6sll-iomuxc" > +- fsl,pins: each entry consists of 6 integers and represents the mux > +and config > + setting for one pin. The first 5 integers <mux_reg conf_reg > +input_reg mux_val > + input_val> are specified using a PIN_FUNC_ID macro, which can be > +found in > + imx6sll-pinfunc.h under device tree source folder. The last integer > +CONFIG is > + the pad setting value like pull-up on this pin. Please refer to > +i.MX6SLL > + Reference Manual for detailed CONFIG settings. > + > +CONFIG bits definition: > +PAD_CTL_LVE (1 << 22) > +PAD_CTL_HYS (1 << 16) > +PAD_CTL_PUS_100K_DOWN (0 << 14) > +PAD_CTL_PUS_47K_UP (1 << 14) > +PAD_CTL_PUS_100K_UP (2 << 14) > +PAD_CTL_PUS_22K_UP (3 << 14) > +PAD_CTL_PUE (1 << 13) > +PAD_CTL_PKE (1 << 12) > +PAD_CTL_ODE (1 << 11) > +PAD_CTL_SPEED_LOW (0 << 6) > +PAD_CTL_SPEED_MED (1 << 6) > +PAD_CTL_SPEED_HIGH (3 << 6) > +PAD_CTL_DSE_DISABLE (0 << 3) > +PAD_CTL_DSE_260ohm (1 << 3) > +PAD_CTL_DSE_130ohm (2 << 3) > +PAD_CTL_DSE_87ohm (3 << 3) > +PAD_CTL_DSE_65ohm (4 << 3) > +PAD_CTL_DSE_52ohm (5 << 3) > +PAD_CTL_DSE_43ohm (6 << 3) > +PAD_CTL_DSE_37ohm (7 << 3) > +PAD_CTL_SRE_FAST (1 << 0) > +PAD_CTL_SRE_SLOW (0 << 0) > + > +Refer to imx6sll-pinfunc.h in device tree source folder for all > +available imx6sll PIN_FUNC_ID. > -- > 1.9.1
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt new file mode 100644 index 0000000..2e897a5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt @@ -0,0 +1,40 @@ +* Freescale i.MX6 SLL IOMUX Controller + +Please refer to fsl,imx-pinctrl.txt in this directory for common binding part +and usage. + +Required properties: +- compatible: "fsl,imx6sll-iomuxc" +- fsl,pins: each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val + input_val> are specified using a PIN_FUNC_ID macro, which can be found in + imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is + the pad setting value like pull-up on this pin. Please refer to i.MX6SLL + Reference Manual for detailed CONFIG settings. + +CONFIG bits definition: +PAD_CTL_LVE (1 << 22) +PAD_CTL_HYS (1 << 16) +PAD_CTL_PUS_100K_DOWN (0 << 14) +PAD_CTL_PUS_47K_UP (1 << 14) +PAD_CTL_PUS_100K_UP (2 << 14) +PAD_CTL_PUS_22K_UP (3 << 14) +PAD_CTL_PUE (1 << 13) +PAD_CTL_PKE (1 << 12) +PAD_CTL_ODE (1 << 11) +PAD_CTL_SPEED_LOW (0 << 6) +PAD_CTL_SPEED_MED (1 << 6) +PAD_CTL_SPEED_HIGH (3 << 6) +PAD_CTL_DSE_DISABLE (0 << 3) +PAD_CTL_DSE_260ohm (1 << 3) +PAD_CTL_DSE_130ohm (2 << 3) +PAD_CTL_DSE_87ohm (3 << 3) +PAD_CTL_DSE_65ohm (4 << 3) +PAD_CTL_DSE_52ohm (5 << 3) +PAD_CTL_DSE_43ohm (6 << 3) +PAD_CTL_DSE_37ohm (7 << 3) +PAD_CTL_SRE_FAST (1 << 0) +PAD_CTL_SRE_SLOW (0 << 0) + +Refer to imx6sll-pinfunc.h in device tree source folder for all available +imx6sll PIN_FUNC_ID.
Add pinctrl binding doc update for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> --- changes v2-v3: - add generic config binding change v3->v4: - add SION bit define - fix typo - move the pin header file to dts patch. change v4->5: - drop generic config, use the old fsl pin config style --- .../bindings/pinctrl/fsl,imx6sll-pinctrl.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt