Message ID | 1521132851-4103-1-git-send-email-yaodong.li@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Joonas suggests to include these files guc.c and wopcm.c in i915.rst with WOPCM being separate section from GuC. Also ensure make htmldocs generates proper/expected documentation. Thanks, Sagar On 3/15/2018 10:24 PM, Jackie Li wrote: > GuC Address Space and WOPCM Layout diagrams won't be generated correctly by > sphinx build if not using proper reST syntax. > > This patch uses reST literal blocks to make sure GuC Address Space and > WOPCM Layout diagrams to be generated correctly, and it also corrects some > errors in the diagram description. > > v2: > - Fixed errors in diagram description > > v3: > - Updated GuC Address Space kernel-doc based on Michal's suggestion > > Signed-off-by: Jackie Li <yaodong.li@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_guc.c | 56 ++++++++++++++++++++------------------ > drivers/gpu/drm/i915/intel_wopcm.c | 44 ++++++++++++++++-------------- > 2 files changed, 52 insertions(+), 48 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c > index 3eb516e..bcbdf15 100644 > --- a/drivers/gpu/drm/i915/intel_guc.c > +++ b/drivers/gpu/drm/i915/intel_guc.c > @@ -495,35 +495,37 @@ int intel_guc_resume(struct intel_guc *guc) > /** > * DOC: GuC Address Space > * > - * The layout of GuC address space is shown as below: > + * The layout of GuC address space is shown below: > * > - * +==============> +====================+ <== GUC_GGTT_TOP > - * ^ | | > - * | | | > - * | | DRAM | > - * | | Memory | > - * | | | > - * GuC | | > - * Address +========> +====================+ <== WOPCM Top > - * Space ^ | HW contexts RSVD | > - * | | | WOPCM | > - * | | +==> +--------------------+ <== GuC WOPCM Top > - * | GuC ^ | | > - * | GGTT | | | > - * | Pin GuC | GuC | > - * | Bias WOPCM | WOPCM | > - * | | Size | | > - * | | | | | > - * v v v | | > - * +=====+=====+==> +====================+ <== GuC WOPCM Base > - * | Non-GuC WOPCM | > - * | (HuC/Reserved) | > - * +====================+ <== WOPCM Base > + * :: > * > - * The lower part [0, GuC ggtt_pin_bias) is mapped to WOPCM which consists of > - * GuC WOPCM and WOPCM reserved for other usage (e.g.RC6 context). The value of > - * the GuC ggtt_pin_bias is determined by the actually GuC WOPCM size which is > - * set in GUC_WOPCM_SIZE register. > + * +==============> +====================+ <== GUC_GGTT_TOP > + * ^ | | > + * | | | > + * | | DRAM | > + * | | Memory | > + * | | | > + * GuC | | > + * Address +========> +====================+ <== WOPCM Top > + * Space ^ | HW contexts RSVD | > + * | | | WOPCM | > + * | | +==> +--------------------+ <== GuC WOPCM Top > + * | GuC ^ | | > + * | GGTT | | | > + * | Pin GuC | GuC | > + * | Bias WOPCM | WOPCM | > + * | | Size | | > + * | | | | | > + * v v v | | > + * +=====+=====+==> +====================+ <== GuC WOPCM Base > + * | Non-GuC WOPCM | > + * | (HuC/Reserved) | > + * +====================+ <== WOPCM Base > + * > + * The lower part of GuC Address Space [0, ggtt_pin_bias) is mapped to WOPCM > + * while upper part of GuC Address Space [ggtt_pin_bias, GUC_GGTT_TOP) is mapped > + * to DRAM. The value of the GuC ggtt_pin_bias is determined by WOPCM size and > + * actual GuC WOPCM size. > */ > > /** > diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c > index 4117886..74bf76f 100644 > --- a/drivers/gpu/drm/i915/intel_wopcm.c > +++ b/drivers/gpu/drm/i915/intel_wopcm.c > @@ -11,28 +11,30 @@ > * DOC: WOPCM Layout > * > * The layout of the WOPCM will be fixed after writing to GuC WOPCM size and > - * offset registers whose are calculated are determined by size of HuC/GuC > - * firmware size and set of hw requirements/restrictions as shown below: > + * offset registers whose values are calculated and determined by HuC/GuC > + * firmware size and set of hardware requirements/restrictions as shown below: > * > - * +=========> +====================+ <== WOPCM Top > - * ^ | HW contexts RSVD | > - * | +===> +====================+ <== GuC WOPCM Top > - * | ^ | | > - * | | | | > - * | | | | > - * | GuC | | > - * | WOPCM | | > - * | Size +--------------------+ > - * WOPCM | | GuC FW RSVD | > - * | | +--------------------+ > - * | | | GuC Stack RSVD | > - * | | +------------------- + > - * | v | GuC WOPCM RSVD | > - * | +===> +====================+ <== GuC WOPCM base > - * | | WOPCM RSVD | > - * | +------------------- + <== HuC Firmware Top > - * v | HuC FW | > - * +=========> +====================+ <== WOPCM Base > + * :: > + * > + * +=========> +====================+ <== WOPCM Top > + * ^ | HW contexts RSVD | > + * | +===> +====================+ <== GuC WOPCM Top > + * | ^ | | > + * | | | | > + * | | | | > + * | GuC | | > + * | WOPCM | | > + * | Size +--------------------+ > + * WOPCM | | GuC FW RSVD | > + * | | +--------------------+ > + * | | | GuC Stack RSVD | > + * | | +------------------- + > + * | v | GuC WOPCM RSVD | > + * | +===> +====================+ <== GuC WOPCM base > + * | | WOPCM RSVD | > + * | +------------------- + <== HuC Firmware Top > + * v | HuC FW | > + * +=========> +====================+ <== WOPCM Base > * > * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top. > * The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
Thanks Sagar and Joonas! I probably need reconfigure my email client. I will add these docs to i915.rst. Since we've already had a GuC chapter defined in i915.rst, so I will include these doc like: WOPCM WOPCM Layout doc GuC <existing GuC doc sections> GuC Address Space doc Please let me know if I misunderstood anything. Thanks, -Jackie On 03/21/2018 04:53 AM, Sagar Arun Kamble wrote: > Joonas suggests to include these files guc.c and wopcm.c in i915.rst > with WOPCM being separate section from GuC. > Also ensure make htmldocs generates proper/expected documentation. > > Thanks, > Sagar > > On 3/15/2018 10:24 PM, Jackie Li wrote: >> GuC Address Space and WOPCM Layout diagrams won't be generated >> correctly by >> sphinx build if not using proper reST syntax. >> >> This patch uses reST literal blocks to make sure GuC Address Space and >> WOPCM Layout diagrams to be generated correctly, and it also corrects >> some >> errors in the diagram description. >> >> v2: >> - Fixed errors in diagram description >> >> v3: >> - Updated GuC Address Space kernel-doc based on Michal's suggestion >> >> Signed-off-by: Jackie Li <yaodong.li@intel.com> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >> --- >> drivers/gpu/drm/i915/intel_guc.c | 56 >> ++++++++++++++++++++------------------ >> drivers/gpu/drm/i915/intel_wopcm.c | 44 ++++++++++++++++-------------- >> 2 files changed, 52 insertions(+), 48 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_guc.c >> b/drivers/gpu/drm/i915/intel_guc.c >> index 3eb516e..bcbdf15 100644 >> --- a/drivers/gpu/drm/i915/intel_guc.c >> +++ b/drivers/gpu/drm/i915/intel_guc.c >> @@ -495,35 +495,37 @@ int intel_guc_resume(struct intel_guc *guc) >> /** >> * DOC: GuC Address Space >> * >> - * The layout of GuC address space is shown as below: >> + * The layout of GuC address space is shown below: >> * >> - * +==============> +====================+ <== GUC_GGTT_TOP >> - * ^ | | >> - * | | | >> - * | | DRAM | >> - * | | Memory | >> - * | | | >> - * GuC | | >> - * Address +========> +====================+ <== WOPCM Top >> - * Space ^ | HW contexts RSVD | >> - * | | | WOPCM | >> - * | | +==> +--------------------+ <== GuC WOPCM Top >> - * | GuC ^ | | >> - * | GGTT | | | >> - * | Pin GuC | GuC | >> - * | Bias WOPCM | WOPCM | >> - * | | Size | | >> - * | | | | | >> - * v v v | | >> - * +=====+=====+==> +====================+ <== GuC WOPCM Base >> - * | Non-GuC WOPCM | >> - * | (HuC/Reserved) | >> - * +====================+ <== WOPCM Base >> + * :: >> * >> - * The lower part [0, GuC ggtt_pin_bias) is mapped to WOPCM which >> consists of >> - * GuC WOPCM and WOPCM reserved for other usage (e.g.RC6 context). >> The value of >> - * the GuC ggtt_pin_bias is determined by the actually GuC WOPCM >> size which is >> - * set in GUC_WOPCM_SIZE register. >> + * +==============> +====================+ <== GUC_GGTT_TOP >> + * ^ | | >> + * | | | >> + * | | DRAM | >> + * | | Memory | >> + * | | | >> + * GuC | | >> + * Address +========> +====================+ <== WOPCM Top >> + * Space ^ | HW contexts RSVD | >> + * | | | WOPCM | >> + * | | +==> +--------------------+ <== GuC WOPCM Top >> + * | GuC ^ | | >> + * | GGTT | | | >> + * | Pin GuC | GuC | >> + * | Bias WOPCM | WOPCM | >> + * | | Size | | >> + * | | | | | >> + * v v v | | >> + * +=====+=====+==> +====================+ <== GuC WOPCM Base >> + * | Non-GuC WOPCM | >> + * | (HuC/Reserved) | >> + * +====================+ <== WOPCM Base >> + * >> + * The lower part of GuC Address Space [0, ggtt_pin_bias) is mapped >> to WOPCM >> + * while upper part of GuC Address Space [ggtt_pin_bias, >> GUC_GGTT_TOP) is mapped >> + * to DRAM. The value of the GuC ggtt_pin_bias is determined by >> WOPCM size and >> + * actual GuC WOPCM size. >> */ >> /** >> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c >> b/drivers/gpu/drm/i915/intel_wopcm.c >> index 4117886..74bf76f 100644 >> --- a/drivers/gpu/drm/i915/intel_wopcm.c >> +++ b/drivers/gpu/drm/i915/intel_wopcm.c >> @@ -11,28 +11,30 @@ >> * DOC: WOPCM Layout >> * >> * The layout of the WOPCM will be fixed after writing to GuC WOPCM >> size and >> - * offset registers whose are calculated are determined by size of >> HuC/GuC >> - * firmware size and set of hw requirements/restrictions as shown >> below: >> + * offset registers whose values are calculated and determined by >> HuC/GuC >> + * firmware size and set of hardware requirements/restrictions as >> shown below: >> * >> - * +=========> +====================+ <== WOPCM Top >> - * ^ | HW contexts RSVD | >> - * | +===> +====================+ <== GuC WOPCM Top >> - * | ^ | | >> - * | | | | >> - * | | | | >> - * | GuC | | >> - * | WOPCM | | >> - * | Size +--------------------+ >> - * WOPCM | | GuC FW RSVD | >> - * | | +--------------------+ >> - * | | | GuC Stack RSVD | >> - * | | +------------------- + >> - * | v | GuC WOPCM RSVD | >> - * | +===> +====================+ <== GuC WOPCM base >> - * | | WOPCM RSVD | >> - * | +------------------- + <== HuC Firmware Top >> - * v | HuC FW | >> - * +=========> +====================+ <== WOPCM Base >> + * :: >> + * >> + * +=========> +====================+ <== WOPCM Top >> + * ^ | HW contexts RSVD | >> + * | +===> +====================+ <== GuC WOPCM Top >> + * | ^ | | >> + * | | | | >> + * | | | | >> + * | GuC | | >> + * | WOPCM | | >> + * | Size +--------------------+ >> + * WOPCM | | GuC FW RSVD | >> + * | | +--------------------+ >> + * | | | GuC Stack RSVD | >> + * | | +------------------- + >> + * | v | GuC WOPCM RSVD | >> + * | +===> +====================+ <== GuC WOPCM base >> + * | | WOPCM RSVD | >> + * | +------------------- + <== HuC Firmware Top >> + * v | HuC FW | >> + * +=========> +====================+ <== WOPCM Base >> * >> * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC >> WOPCM top. >> * The top part of the WOPCM is reserved for hardware contexts >> (e.g. RC6 >
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 3eb516e..bcbdf15 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -495,35 +495,37 @@ int intel_guc_resume(struct intel_guc *guc) /** * DOC: GuC Address Space * - * The layout of GuC address space is shown as below: + * The layout of GuC address space is shown below: * - * +==============> +====================+ <== GUC_GGTT_TOP - * ^ | | - * | | | - * | | DRAM | - * | | Memory | - * | | | - * GuC | | - * Address +========> +====================+ <== WOPCM Top - * Space ^ | HW contexts RSVD | - * | | | WOPCM | - * | | +==> +--------------------+ <== GuC WOPCM Top - * | GuC ^ | | - * | GGTT | | | - * | Pin GuC | GuC | - * | Bias WOPCM | WOPCM | - * | | Size | | - * | | | | | - * v v v | | - * +=====+=====+==> +====================+ <== GuC WOPCM Base - * | Non-GuC WOPCM | - * | (HuC/Reserved) | - * +====================+ <== WOPCM Base + * :: * - * The lower part [0, GuC ggtt_pin_bias) is mapped to WOPCM which consists of - * GuC WOPCM and WOPCM reserved for other usage (e.g.RC6 context). The value of - * the GuC ggtt_pin_bias is determined by the actually GuC WOPCM size which is - * set in GUC_WOPCM_SIZE register. + * +==============> +====================+ <== GUC_GGTT_TOP + * ^ | | + * | | | + * | | DRAM | + * | | Memory | + * | | | + * GuC | | + * Address +========> +====================+ <== WOPCM Top + * Space ^ | HW contexts RSVD | + * | | | WOPCM | + * | | +==> +--------------------+ <== GuC WOPCM Top + * | GuC ^ | | + * | GGTT | | | + * | Pin GuC | GuC | + * | Bias WOPCM | WOPCM | + * | | Size | | + * | | | | | + * v v v | | + * +=====+=====+==> +====================+ <== GuC WOPCM Base + * | Non-GuC WOPCM | + * | (HuC/Reserved) | + * +====================+ <== WOPCM Base + * + * The lower part of GuC Address Space [0, ggtt_pin_bias) is mapped to WOPCM + * while upper part of GuC Address Space [ggtt_pin_bias, GUC_GGTT_TOP) is mapped + * to DRAM. The value of the GuC ggtt_pin_bias is determined by WOPCM size and + * actual GuC WOPCM size. */ /** diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c index 4117886..74bf76f 100644 --- a/drivers/gpu/drm/i915/intel_wopcm.c +++ b/drivers/gpu/drm/i915/intel_wopcm.c @@ -11,28 +11,30 @@ * DOC: WOPCM Layout * * The layout of the WOPCM will be fixed after writing to GuC WOPCM size and - * offset registers whose are calculated are determined by size of HuC/GuC - * firmware size and set of hw requirements/restrictions as shown below: + * offset registers whose values are calculated and determined by HuC/GuC + * firmware size and set of hardware requirements/restrictions as shown below: * - * +=========> +====================+ <== WOPCM Top - * ^ | HW contexts RSVD | - * | +===> +====================+ <== GuC WOPCM Top - * | ^ | | - * | | | | - * | | | | - * | GuC | | - * | WOPCM | | - * | Size +--------------------+ - * WOPCM | | GuC FW RSVD | - * | | +--------------------+ - * | | | GuC Stack RSVD | - * | | +------------------- + - * | v | GuC WOPCM RSVD | - * | +===> +====================+ <== GuC WOPCM base - * | | WOPCM RSVD | - * | +------------------- + <== HuC Firmware Top - * v | HuC FW | - * +=========> +====================+ <== WOPCM Base + * :: + * + * +=========> +====================+ <== WOPCM Top + * ^ | HW contexts RSVD | + * | +===> +====================+ <== GuC WOPCM Top + * | ^ | | + * | | | | + * | | | | + * | GuC | | + * | WOPCM | | + * | Size +--------------------+ + * WOPCM | | GuC FW RSVD | + * | | +--------------------+ + * | | | GuC Stack RSVD | + * | | +------------------- + + * | v | GuC WOPCM RSVD | + * | +===> +====================+ <== GuC WOPCM base + * | | WOPCM RSVD | + * | +------------------- + <== HuC Firmware Top + * v | HuC FW | + * +=========> +====================+ <== WOPCM Base * * GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top. * The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
GuC Address Space and WOPCM Layout diagrams won't be generated correctly by sphinx build if not using proper reST syntax. This patch uses reST literal blocks to make sure GuC Address Space and WOPCM Layout diagrams to be generated correctly, and it also corrects some errors in the diagram description. v2: - Fixed errors in diagram description v3: - Updated GuC Address Space kernel-doc based on Michal's suggestion Signed-off-by: Jackie Li <yaodong.li@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/intel_guc.c | 56 ++++++++++++++++++++------------------ drivers/gpu/drm/i915/intel_wopcm.c | 44 ++++++++++++++++-------------- 2 files changed, 52 insertions(+), 48 deletions(-)