diff mbox

pciehp: change wait time for valid configuration access

Message ID 4E1A4EC1.8070603@jp.fujitsu.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Kenji Kaneshige July 11, 2011, 1:15 a.m. UTC 
Jesse,

Here is the updated patch.

Regards,
Kenji Kaneshige


Naoki Yanagimoto reported that configuration read on some hot-added
PCIe device returns invalid value. This patch fixes this problem.

According to the PCIe spec, software must wait for at least 1 second
to judge if the hot-added device is broken after Data Link Layer State
Changed Event. This patch changes pciehp driver to wait for 1 second
after the Data Link Layer State Changed Event is detected before
initiating a configuration access instead of 100 ms.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Tested-by: Naoki Yanagimoto <yanagimoto@np.css.fujitsu.com>

---
 drivers/pci/hotplug/pciehp_ctrl.c |    3 +++
 drivers/pci/hotplug/pciehp_hpc.c  |   11 ++---------
 2 files changed, 5 insertions(+), 9 deletions(-)



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Comments

Jesse Barnes July 22, 2011, 4:09 p.m. UTC | #1 
On Mon, 11 Jul 2011 10:15:45 +0900
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> wrote:

> Jesse,
> 
> Here is the updated patch.
> 
> Regards,
> Kenji Kaneshige
> 
> 
> Naoki Yanagimoto reported that configuration read on some hot-added
> PCIe device returns invalid value. This patch fixes this problem.
> 
> According to the PCIe spec, software must wait for at least 1 second
> to judge if the hot-added device is broken after Data Link Layer State
> Changed Event. This patch changes pciehp driver to wait for 1 second
> after the Data Link Layer State Changed Event is detected before
> initiating a configuration access instead of 100 ms.
> 
> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
> Tested-by: Naoki Yanagimoto <yanagimoto@np.css.fujitsu.com>
> 

Applied, thanks.
diff mbox

Patch

Index: 20110705/drivers/pci/hotplug/pciehp_ctrl.c
===================================================================
--- 20110705.orig/drivers/pci/hotplug/pciehp_ctrl.c
+++ 20110705/drivers/pci/hotplug/pciehp_ctrl.c
@@ -213,6 +213,9 @@  static int board_added(struct slot *p_sl
 		goto err_exit;
 	}
 
+	/* Wait for 1 second after checking link training status */
+	msleep(1000);
+
 	/* Check for a power fault */
 	if (ctrl->power_fault_detected || pciehp_query_power_fault(p_slot)) {
 		ctrl_err(ctrl, "Power fault on slot %s\n", slot_name(p_slot));
Index: 20110705/drivers/pci/hotplug/pciehp_hpc.c
===================================================================
--- 20110705.orig/drivers/pci/hotplug/pciehp_hpc.c
+++ 20110705/drivers/pci/hotplug/pciehp_hpc.c
@@ -275,16 +275,9 @@  int pciehp_check_link_status(struct cont
          * hot-plug capable downstream port. But old controller might
          * not implement it. In this case, we wait for 1000 ms.
          */
-        if (ctrl->link_active_reporting){
-                /* Wait for Data Link Layer Link Active bit to be set */
+        if (ctrl->link_active_reporting)
                 pcie_wait_link_active(ctrl);
-                /*
-                 * We must wait for 100 ms after the Data Link Layer
-                 * Link Active bit reads 1b before initiating a
-                 * configuration access to the hot added device.
-                 */
-                msleep(100);
-        } else
+        else
                 msleep(1000);
 
 	retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);