Message ID | 1527058129-10260-5-git-send-email-zhangqing@rock-chips.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Am Mittwoch, 23. Mai 2018, 08:48:40 CEST schrieb Elaine Zhang: > From: Finley Xiao <finley.xiao@rock-chips.com> > > Solve the pd could only ever turn off but never turn them on again, > If the pd registers have the writemask bits. > > Fix up the code error for commit: > commit 79bb17ce8edb3141339b5882e372d0ec7346217c > Author: Elaine Zhang <zhangqing@rock-chips.com> > Date: Fri Dec 23 11:47:52 2016 +0800 > > soc: rockchip: power-domain: Support domain control in hiword-registers > > New Rockchips SoCs may have their power-domain control in registers > using a writemask-based access scheme (upper 16bit being the write > mask). So add a DOMAIN_M type and handle this case accordingly. > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > > Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> I've already applied that patch from v2. Heiko
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index ebd7c41898c0..01d4ba26a054 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -264,7 +264,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd, return; else if (pd->info->pwr_w_mask) regmap_write(pmu->regmap, pmu->info->pwr_offset, - on ? pd->info->pwr_mask : + on ? pd->info->pwr_w_mask : (pd->info->pwr_mask | pd->info->pwr_w_mask)); else regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,