diff mbox

[v2] OMAP: CLK: CLKSRC: Add suspend resume hooks

Message ID 1527013340-8036-1-git-send-email-j-keerthy@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

J, KEERTHY May 22, 2018, 6:22 p.m. UTC
Add the save and restore for clksrc as part of suspend and resume
so that it saves the counter value and restores. This is needed in
modes like rtc+ddr in self-refresh not doing this stalls the time.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---

Changes in v2:

  * Instead of everytime looking up for clksrc hwmod doing it once during init
  * Tested on am437x-gp-evm

Probably too late for 4.18!

 arch/arm/mach-omap2/timer.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Tony Lindgren May 23, 2018, 6:41 p.m. UTC | #1
* Keerthy <j-keerthy@ti.com> [180522 11:24]:
> Add the save and restore for clksrc as part of suspend and resume
> so that it saves the counter value and restores. This is needed in
> modes like rtc+ddr in self-refresh not doing this stalls the time.

Can't we now do this all in drivers/clocksource/timer-ti-*.c?

> @@ -490,6 +513,15 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
>  	res = omap_dm_timer_init_one(&clksrc, fck_source, property,
>  				     &clocksource_gpt.name,
>  				     OMAP_TIMER_NONPOSTED);
> +
> +	if (soc_is_am43xx()) {
> +		clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend;
> +		clocksource_gpt.resume = omap2_gptimer_clksrc_resume;
> +
> +		clocksource_gpt_hwmod =
> +			omap_hwmod_lookup(clocksource_gpt.name);
> +	}
> +

Then you can do this based on a quirk flag set by compatible.

Regards,

Tony
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J, KEERTHY May 23, 2018, 8:38 p.m. UTC | #2
On 5/24/2018 12:11 AM, Tony Lindgren wrote:
> * Keerthy <j-keerthy@ti.com> [180522 11:24]:
>> Add the save and restore for clksrc as part of suspend and resume
>> so that it saves the counter value and restores. This is needed in
>> modes like rtc+ddr in self-refresh not doing this stalls the time.
> Can't we now do this all in drivers/clocksource/timer-ti-*.c?

arch/arm/boot/dts/am4372.dtsi has compatible ti,omap-counter32k
which is arch/arm/mach-omap2/timer.c compatible

IMHO clocksource suspend resume best fits under mach-omap2/timer.c
just like clockevent has suspend/resume.

>
>> @@ -490,6 +513,15 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
>>   	res = omap_dm_timer_init_one(&clksrc, fck_source, property,
>>   				     &clocksource_gpt.name,
>>   				     OMAP_TIMER_NONPOSTED);
>> +
>> +	if (soc_is_am43xx()) {
>> +		clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend;
>> +		clocksource_gpt.resume = omap2_gptimer_clksrc_resume;
>> +
>> +		clocksource_gpt_hwmod =
>> +			omap_hwmod_lookup(clocksource_gpt.name);
>> +	}
>> +
> Then you can do this based on a quirk flag set by compatible.
>
> Regards,
>
> Tony

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Tony Lindgren May 23, 2018, 9:17 p.m. UTC | #3
* J, KEERTHY <j-keerthy@ti.com> [180523 20:40]:
> 
> 
> On 5/24/2018 12:11 AM, Tony Lindgren wrote:
> > * Keerthy <j-keerthy@ti.com> [180522 11:24]:
> > > Add the save and restore for clksrc as part of suspend and resume
> > > so that it saves the counter value and restores. This is needed in
> > > modes like rtc+ddr in self-refresh not doing this stalls the time.
> > Can't we now do this all in drivers/clocksource/timer-ti-*.c?
> 
> arch/arm/boot/dts/am4372.dtsi has compatible ti,omap-counter32k
> which is arch/arm/mach-omap2/timer.c compatible

Oh OK.

> IMHO clocksource suspend resume best fits under mach-omap2/timer.c
> just like clockevent has suspend/resume.

Yup you're right. Applying into omap-for-v4.18/soc thanks.
No guarantees at this point it will get merged though.

Regards,

Tony
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 5a70ab6..98ed5ac 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -70,6 +70,9 @@ 
 /* Clockevent hwmod for am335x and am437x suspend */
 static struct omap_hwmod *clockevent_gpt_hwmod;
 
+/* Clockesource hwmod for am437x suspend */
+static struct omap_hwmod *clocksource_gpt_hwmod;
+
 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 static unsigned long arch_timer_freq;
 
@@ -478,6 +481,26 @@  static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 	return ret;
 }
 
+static unsigned int omap2_gptimer_clksrc_load;
+
+static void omap2_gptimer_clksrc_suspend(struct clocksource *unused)
+{
+	omap2_gptimer_clksrc_load =
+		__omap_dm_timer_read_counter(&clksrc, OMAP_TIMER_NONPOSTED);
+
+	omap_hwmod_idle(clocksource_gpt_hwmod);
+}
+
+static void omap2_gptimer_clksrc_resume(struct clocksource *unused)
+{
+	omap_hwmod_enable(clocksource_gpt_hwmod);
+
+	__omap_dm_timer_load_start(&clksrc,
+				   OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR,
+				   omap2_gptimer_clksrc_load,
+				   OMAP_TIMER_NONPOSTED);
+}
+
 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
 						  const char *fck_source,
 						  const char *property)
@@ -490,6 +513,15 @@  static void __init omap2_gptimer_clocksource_init(int gptimer_id,
 	res = omap_dm_timer_init_one(&clksrc, fck_source, property,
 				     &clocksource_gpt.name,
 				     OMAP_TIMER_NONPOSTED);
+
+	if (soc_is_am43xx()) {
+		clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend;
+		clocksource_gpt.resume = omap2_gptimer_clksrc_resume;
+
+		clocksource_gpt_hwmod =
+			omap_hwmod_lookup(clocksource_gpt.name);
+	}
+
 	BUG_ON(res);
 
 	__omap_dm_timer_load_start(&clksrc,