| Message ID | 20180618120310.39527-4-mark.rutland@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Jun 18, 2018 at 01:02:54PM +0100, Mark Rutland wrote: > Currently we have a couple of helpers to manipulate bits in particular > sysregs: > > * config_sctlr_el1(u32 clear, u32 set) > > * change_cpacr(u64 val, u64 mask) > > The parameters of these differ in naming convention, order, and size, > which is unfortunate. They also differ slightly in behaviour, as > change_cpacr() skips the sysreg write if the bits are unchanged, which > is a useful optimization when sysreg writes are expensive. > > Before we gain more yet another sysreg manipulation function, let's > unify these with a common helper, providing a consistent order for > clear/set operands, and the write skipping behaviour from > change_cpacr(). Code will be migrated to the new helper in subsequent > patches. > > Signed-off-by: Mark Rutland <mark.rutland@arm.com> > Reviewed-by: Dave Martin <dave.martin@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
On 18/06/18 13:02, Mark Rutland wrote: > Currently we have a couple of helpers to manipulate bits in particular > sysregs: > > * config_sctlr_el1(u32 clear, u32 set) > > * change_cpacr(u64 val, u64 mask) > > The parameters of these differ in naming convention, order, and size, > which is unfortunate. They also differ slightly in behaviour, as > change_cpacr() skips the sysreg write if the bits are unchanged, which > is a useful optimization when sysreg writes are expensive. > > Before we gain more yet another sysreg manipulation function, let's > unify these with a common helper, providing a consistent order for > clear/set operands, and the write skipping behaviour from > change_cpacr(). Code will be migrated to the new helper in subsequent > patches. > > Signed-off-by: Mark Rutland <mark.rutland@arm.com> > Reviewed-by: Dave Martin <dave.martin@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Marc Zyngier <marc.zyngier@arm.com> > --- > arch/arm64/include/asm/sysreg.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 48ad361c178e..fefc17dae8ee 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -731,6 +731,17 @@ asm( > asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val)); \ > } while (0) > > +/* > + * Modify bits in a sysreg. Bits in the clear mask are zeroed, then bits in the > + * set mask are set. Other bits are left as-is. > + */ > +#define sysreg_clear_set(sysreg, clear, set) do { \ > + u64 __scs_val = read_sysreg(sysreg); \ > + u64 __scs_new = (__scs_val & ~(u64)(clear)) | (set); \ > + if (__scs_new != __scs_val) \ > + write_sysreg(__scs_new, sysreg); \ > +} while (0) > + > static inline void config_sctlr_el1(u32 clear, u32 set) > { > u32 val; > For the record, I have this patch as part of Dave's FPSIMD/SVE fixes. Thanks, M.
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 48ad361c178e..fefc17dae8ee 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -731,6 +731,17 @@ asm( asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val)); \ } while (0) +/* + * Modify bits in a sysreg. Bits in the clear mask are zeroed, then bits in the + * set mask are set. Other bits are left as-is. + */ +#define sysreg_clear_set(sysreg, clear, set) do { \ + u64 __scs_val = read_sysreg(sysreg); \ + u64 __scs_new = (__scs_val & ~(u64)(clear)) | (set); \ + if (__scs_new != __scs_val) \ + write_sysreg(__scs_new, sysreg); \ +} while (0) + static inline void config_sctlr_el1(u32 clear, u32 set) { u32 val;