| Message ID | 20180610140122.25510-1-hdegoede@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi, On 10-06-18 16:01, Hans de Goede wrote: > Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead > they require an external ULPI phy for device-mode. > > Only some BYT devices have an external phy, but even on those devices > device-mode is not working because the dwc3 does not see the phy. > > The problem is that the ACPI fwnode for the dwc3 does not contain the > expected GPIO resources for the GPIOs connected to the chip-select and > reset pins of the phy. > > I've found the workaround which some Android x86 kernels use for this: > https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c > Which boils down to hardcoding the GPIOs for these devices. > > The good news it that all boards (*) use the same GPIOs. > > This commit fixes the ULPI phy not woring by adding a gpiod_lookup_table > call which adds a hardcoded mapping for BYT devices. Note that the mapping > added by gpiod_add_lookup_table is a fallback mapping, so boards which > properly provide GPIO resources in the ACPI firmware-node resources > will not use this. > > *) Except for the first revision of the evalulation-kit, which normal users > don't have > > Signed-off-by: Hans de Goede <hdegoede@redhat.com> > --- > Changes in v3: > -Add the mapping with gpiod_add_lookup_table() unconditionally on BYT > devices, as they are only used after checking for GPIO resources in ACPI Ping? AFAIK this series is ready for merging now and it is necessary to make gadget mode work on all Bay Trail devices which support gadget mode. Regards, Hans > --- > drivers/usb/dwc3/dwc3-pci.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c > index c961a94d136b..c58f87b01ac7 100644 > --- a/drivers/usb/dwc3/dwc3-pci.c > +++ b/drivers/usb/dwc3/dwc3-pci.c > @@ -16,6 +16,7 @@ > #include <linux/pm_runtime.h> > #include <linux/platform_device.h> > #include <linux/gpio/consumer.h> > +#include <linux/gpio/machine.h> > #include <linux/acpi.h> > #include <linux/delay.h> > > @@ -66,6 +67,15 @@ static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { > { }, > }; > > +static struct gpiod_lookup_table platform_bytcr_gpios = { > + .dev_id = "0000:00:16.0", > + .table = { > + GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH), > + GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH), > + {} > + }, > +}; > + > static int dwc3_pci_quirks(struct dwc3_pci *dwc) > { > struct platform_device *dwc3 = dwc->dwc3; > @@ -126,6 +136,13 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) > if (ret) > dev_dbg(&pdev->dev, "failed to add mapping table\n"); > > + /* > + * A lot of BYT devices lack ACPI resource entries for > + * the GPIOs, add a fallback mapping to the reference > + * design GPIOs which all boards seem to use. > + */ > + gpiod_add_lookup_table(&platform_bytcr_gpios); > + > /* > * These GPIOs will turn on the USB2 PHY. Note that we have to > * put the gpio descriptors again here because the phy driver > @@ -256,6 +273,7 @@ static void dwc3_pci_remove(struct pci_dev *pci) > { > struct dwc3_pci *dwc = pci_get_drvdata(pci); > > + gpiod_remove_lookup_table(&platform_bytcr_gpios); > #ifdef CONFIG_PM > cancel_work_sync(&dwc->wakeup_work); > #endif > -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hans de Goede <hdegoede@redhat.com> writes: > Hi, > > On 10-06-18 16:01, Hans de Goede wrote: >> Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead >> they require an external ULPI phy for device-mode. >> >> Only some BYT devices have an external phy, but even on those devices >> device-mode is not working because the dwc3 does not see the phy. >> >> The problem is that the ACPI fwnode for the dwc3 does not contain the >> expected GPIO resources for the GPIOs connected to the chip-select and >> reset pins of the phy. >> >> I've found the workaround which some Android x86 kernels use for this: >> https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c >> Which boils down to hardcoding the GPIOs for these devices. >> >> The good news it that all boards (*) use the same GPIOs. >> >> This commit fixes the ULPI phy not woring by adding a gpiod_lookup_table >> call which adds a hardcoded mapping for BYT devices. Note that the mapping >> added by gpiod_add_lookup_table is a fallback mapping, so boards which >> properly provide GPIO resources in the ACPI firmware-node resources >> will not use this. >> >> *) Except for the first revision of the evalulation-kit, which normal users >> don't have >> >> Signed-off-by: Hans de Goede <hdegoede@redhat.com> >> --- >> Changes in v3: >> -Add the mapping with gpiod_add_lookup_table() unconditionally on BYT >> devices, as they are only used after checking for GPIO resources in ACPI > > Ping? AFAIK this series is ready for merging now and it is necessary to > make gadget mode work on all Bay Trail devices which support gadget > mode. now queued for v4.19
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index c961a94d136b..c58f87b01ac7 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -16,6 +16,7 @@ #include <linux/pm_runtime.h> #include <linux/platform_device.h> #include <linux/gpio/consumer.h> +#include <linux/gpio/machine.h> #include <linux/acpi.h> #include <linux/delay.h> @@ -66,6 +67,15 @@ static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { { }, }; +static struct gpiod_lookup_table platform_bytcr_gpios = { + .dev_id = "0000:00:16.0", + .table = { + GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH), + {} + }, +}; + static int dwc3_pci_quirks(struct dwc3_pci *dwc) { struct platform_device *dwc3 = dwc->dwc3; @@ -126,6 +136,13 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) if (ret) dev_dbg(&pdev->dev, "failed to add mapping table\n"); + /* + * A lot of BYT devices lack ACPI resource entries for + * the GPIOs, add a fallback mapping to the reference + * design GPIOs which all boards seem to use. + */ + gpiod_add_lookup_table(&platform_bytcr_gpios); + /* * These GPIOs will turn on the USB2 PHY. Note that we have to * put the gpio descriptors again here because the phy driver @@ -256,6 +273,7 @@ static void dwc3_pci_remove(struct pci_dev *pci) { struct dwc3_pci *dwc = pci_get_drvdata(pci); + gpiod_remove_lookup_table(&platform_bytcr_gpios); #ifdef CONFIG_PM cancel_work_sync(&dwc->wakeup_work); #endif
Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead they require an external ULPI phy for device-mode. Only some BYT devices have an external phy, but even on those devices device-mode is not working because the dwc3 does not see the phy. The problem is that the ACPI fwnode for the dwc3 does not contain the expected GPIO resources for the GPIOs connected to the chip-select and reset pins of the phy. I've found the workaround which some Android x86 kernels use for this: https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c Which boils down to hardcoding the GPIOs for these devices. The good news it that all boards (*) use the same GPIOs. This commit fixes the ULPI phy not woring by adding a gpiod_lookup_table call which adds a hardcoded mapping for BYT devices. Note that the mapping added by gpiod_add_lookup_table is a fallback mapping, so boards which properly provide GPIO resources in the ACPI firmware-node resources will not use this. *) Except for the first revision of the evalulation-kit, which normal users don't have Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- Changes in v3: -Add the mapping with gpiod_add_lookup_table() unconditionally on BYT devices, as they are only used after checking for GPIO resources in ACPI --- drivers/usb/dwc3/dwc3-pci.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)