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[7/7] arm64: dts: mt7622: add earlycon to mt7622-rfb1 board

Message ID 4a8b1000e7d8979b0c6c6f9836296b7dd382f6cd.1529639050.git.sean.wang@mediatek.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sean Wang June 22, 2018, 3:49 a.m. UTC
From: Sean Wang <sean.wang@mediatek.com>

Add earlycon to mt7622-rfb1 as to know what was going on when a certain
fault is happening at the early initialization stage.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Matthias Brugger July 16, 2018, 1:37 p.m. UTC | #1
On 22/06/18 05:49, sean.wang@mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
> 
> Add earlycon to mt7622-rfb1 as to know what was going on when a certain
> fault is happening at the early initialization stage.
> 
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)


pushed now to v4.18-next/dts64

Thanks
Matthias

> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> index 1ff003e..a747b7b 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
> @@ -18,7 +18,7 @@
>  	compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
>  
>  	chosen {
> -		bootargs = "console=ttyS0,115200n1 swiotlb=512";
> +		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
>  	};
>  
>  	cpus {
>
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index 1ff003e..a747b7b 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -18,7 +18,7 @@ 
 	compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
 
 	chosen {
-		bootargs = "console=ttyS0,115200n1 swiotlb=512";
+		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
 	};
 
 	cpus {