diff mbox

[v2] drm/pl111: Use 64-bit arithmetic instead of 32-bit

Message ID 20180704142255.GA8614@embeddedor.com (mailing list archive)
State New, archived
Headers show

Commit Message

Gustavo A. R. Silva July 4, 2018, 2:22 p.m. UTC
Add suffix ULL to constant 1000 in order to give the compiler complete
information about the proper arithmetic to use.

Notice that such constant is used in a context that expects an
expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arithmetic:

mode->clock * 1000

Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
---
Changes in v2:
 - Use suffix ULL instead of UL.

 drivers/gpu/drm/pl111/pl111_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Eric Anholt July 17, 2018, 6:40 p.m. UTC | #1
"Gustavo A. R. Silva" <gustavo@embeddedor.com> writes:

> Add suffix ULL to constant 1000 in order to give the compiler complete
> information about the proper arithmetic to use.
>
> Notice that such constant is used in a context that expects an
> expression of type u64 (64 bits, unsigned) and the following
> expression is currently being evaluated using 32-bit arithmetic:
>
> mode->clock * 1000
>
> Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow")
> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>

This is silly.  The clock won't be over 4ghz -- we haven't seen anything
over 1024x768 on this hardware as far as I know.  The u64 is for the
multiplication by width/height below.

I've still applied the patch to shut up the tool.
Gustavo A. R. Silva July 17, 2018, 7:52 p.m. UTC | #2
Hi Eric,

On 07/17/2018 01:40 PM, Eric Anholt wrote:
> "Gustavo A. R. Silva" <gustavo@embeddedor.com> writes:
> 
>> Add suffix ULL to constant 1000 in order to give the compiler complete
>> information about the proper arithmetic to use.
>>
>> Notice that such constant is used in a context that expects an
>> expression of type u64 (64 bits, unsigned) and the following
>> expression is currently being evaluated using 32-bit arithmetic:
>>
>> mode->clock * 1000
>>
>> Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow")
>> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
> 
> This is silly.  The clock won't be over 4ghz -- we haven't seen anything
> over 1024x768 on this hardware as far as I know.  The u64 is for the
> multiplication by width/height below.
> 

Yep. I understand. That's why I didn't use the word *fix* anywhere in
the changelog.

> I've still applied the patch to shut up the tool.
> 

Thanks
--
Gustavo
diff mbox

Patch

diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c
index a432eb7..754f6b2 100644
--- a/drivers/gpu/drm/pl111/pl111_display.c
+++ b/drivers/gpu/drm/pl111/pl111_display.c
@@ -63,7 +63,7 @@  pl111_mode_valid(struct drm_crtc *crtc,
 	 * We use the pixelclock to also account for interlaced modes, the
 	 * resulting bandwidth is in bytes per second.
 	 */
-	bw = mode->clock * 1000; /* In Hz */
+	bw = mode->clock * 1000ULL; /* In Hz */
 	bw = bw * mode->hdisplay * mode->vdisplay * cpp;
 	bw = div_u64(bw, mode->htotal * mode->vtotal);