| Message ID | 20180803030237.3366-6-songjun.wu@linux.intel.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | MIPS: intel: add initial support for Intel MIPS SoCs | expand |
On Thu, Aug 2, 2018 at 9:03 PM Songjun Wu <songjun.wu@linux.intel.com> wrote: > > From: Hua Ma <hua.ma@linux.intel.com> > > This patch adds binding documentation for the > compatible values of the Intel MIPS SoCs. > > Signed-off-by: Hua Ma <hua.ma@linux.intel.com> > Signed-off-by: Songjun Wu <songjun.wu@linux.intel.com> > --- > > Changes in v2: > - New patch split from previous patch > - Add the board and chip compatible in dt document > > Documentation/devicetree/bindings/mips/intel.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mips/intel.txt Reviewed-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/mips/intel.txt b/Documentation/devicetree/bindings/mips/intel.txt new file mode 100644 index 000000000000..ac594ef303b7 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/intel.txt @@ -0,0 +1,17 @@ +Intel MIPS SoC device tree bindings + +1, SoCs + +Each device tree must specify a compatible value for the Intel SoC +it uses in the compatible property of the root node. The compatible +value must be one of the following values: + + intel,xrx500 + +2, Boards + +Each device tree must specify a compatible value for the Intel Board +it uses in the compatible property of the root node. The compatible +value must be one of the following values: + + intel,easy350-anywan