diff mbox series

[v3,11/13] drm/msm/dpu: remove display H_TILE from encoder

Message ID 1533698411-29819-2-git-send-email-jsanka@codeaurora.org (mailing list archive)
State New, archived
Headers show
Series Atomic resource management | expand

Commit Message

Jeykumar Sankaran Aug. 8, 2018, 3:20 a.m. UTC 
Encoder H_TILE values are not used for allocating the hw blocks.
no. of hw_intf blocks provides the info.

changes in v2:
	- none
changes in v3:
	- none

Change-Id: I1c1c13e9b9f608fbaa8c5897f9f1892029107ac5
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  5 -----
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  4 ----
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c      | 11 +++++------
 3 files changed, 5 insertions(+), 15 deletions(-)

Comments

Sean Paul Aug. 14, 2018, 8:17 p.m. UTC | #1 
On Tue, Aug 07, 2018 at 08:20:09PM -0700, Jeykumar Sankaran wrote:
> Encoder H_TILE values are not used for allocating the hw blocks.
> no. of hw_intf blocks provides the info.
> 
> changes in v2:
> 	- none
> changes in v3:
> 	- none
> 
> Change-Id: I1c1c13e9b9f608fbaa8c5897f9f1892029107ac5
> Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  5 -----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  4 ----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c      | 11 +++++------
>  3 files changed, 5 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 58647ed..fe0b563 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -179,8 +179,6 @@ struct dpu_encoder_virt {
>  	spinlock_t enc_spinlock;
>  	uint32_t bus_scaling_client;
>  
> -	uint32_t display_num_of_h_tiles;
> -
>  	unsigned int num_phys_encs;
>  	struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
>  	struct dpu_encoder_phys *cur_master;
> @@ -461,7 +459,6 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
>  
>  	/* Query resources used by phys encs, expected to be without overlap */
>  	memset(hw_res, 0, sizeof(*hw_res));
> -	hw_res->display_num_of_h_tiles = dpu_enc->display_num_of_h_tiles;
>  
>  	for (i = 0; i < dpu_enc->num_phys_encs; i++) {
>  		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
> @@ -2268,8 +2265,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
>  
>  	WARN_ON(disp_info->num_of_h_tiles < 1);
>  
> -	dpu_enc->display_num_of_h_tiles = disp_info->num_of_h_tiles;
> -
>  	DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles);
>  
>  	if ((disp_info->capabilities & MSM_DISPLAY_CAP_CMD_MODE) ||
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> index 60f809f..e453271 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> @@ -33,14 +33,10 @@
>   * Encoder functions and data types
>   * @intfs:	Interfaces this encoder is using, INTF_MODE_NONE if unused
>   * @needs_cdm:	Encoder requests a CDM based on pixel format conversion needs
> - * @display_num_of_h_tiles: Number of horizontal tiles in case of split
> - *                          interface
> - * @topology:   Topology of the display

Whoops, this needs to go in the other change.

>   */
>  struct dpu_encoder_hw_resources {
>  	enum dpu_intf_mode intfs[INTF_MAX];
>  	bool needs_cdm;
> -	u32 display_num_of_h_tiles;
>  };
>  
>  /**
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index 1457ae5..3444469 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -817,12 +817,11 @@ static int _dpu_rm_populate_requirements(
>  		conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI)
>  		reqs->top_ctrl |= BIT(DPU_RM_TOPCTL_DS);
>  
> -	DRM_DEBUG_KMS("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
> -		      reqs->hw_res.display_num_of_h_tiles);
> -	DRM_DEBUG_KMS("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
> -		      reqs->topology->num_lm, reqs->topology->num_ctl,
> -		      reqs->topology->top_name,
> -		      reqs->topology->needs_split_display);
> +	DPU_DEBUG("top_ctrl: 0x%llX\n", reqs->top_ctrl);
> +	DPU_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",

Why change these back to DPU_DEBUG? At some point, we need to remove the
DPU_* messages in favor of DRM_*, so let's try not to go backwards in the
meantime.

Sean

> +			reqs->topology->num_lm, reqs->topology->num_ctl,
> +			reqs->topology->top_name,
> +			reqs->topology->needs_split_display);
>  
>  	return 0;
>  }
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 58647ed..fe0b563 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -179,8 +179,6 @@  struct dpu_encoder_virt {
 	spinlock_t enc_spinlock;
 	uint32_t bus_scaling_client;
 
-	uint32_t display_num_of_h_tiles;
-
 	unsigned int num_phys_encs;
 	struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
 	struct dpu_encoder_phys *cur_master;
@@ -461,7 +459,6 @@  void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
 
 	/* Query resources used by phys encs, expected to be without overlap */
 	memset(hw_res, 0, sizeof(*hw_res));
-	hw_res->display_num_of_h_tiles = dpu_enc->display_num_of_h_tiles;
 
 	for (i = 0; i < dpu_enc->num_phys_encs; i++) {
 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
@@ -2268,8 +2265,6 @@  static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
 
 	WARN_ON(disp_info->num_of_h_tiles < 1);
 
-	dpu_enc->display_num_of_h_tiles = disp_info->num_of_h_tiles;
-
 	DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles);
 
 	if ((disp_info->capabilities & MSM_DISPLAY_CAP_CMD_MODE) ||
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index 60f809f..e453271 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -33,14 +33,10 @@ 
  * Encoder functions and data types
  * @intfs:	Interfaces this encoder is using, INTF_MODE_NONE if unused
  * @needs_cdm:	Encoder requests a CDM based on pixel format conversion needs
- * @display_num_of_h_tiles: Number of horizontal tiles in case of split
- *                          interface
- * @topology:   Topology of the display
  */
 struct dpu_encoder_hw_resources {
 	enum dpu_intf_mode intfs[INTF_MAX];
 	bool needs_cdm;
-	u32 display_num_of_h_tiles;
 };
 
 /**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 1457ae5..3444469 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -817,12 +817,11 @@  static int _dpu_rm_populate_requirements(
 		conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI)
 		reqs->top_ctrl |= BIT(DPU_RM_TOPCTL_DS);
 
-	DRM_DEBUG_KMS("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
-		      reqs->hw_res.display_num_of_h_tiles);
-	DRM_DEBUG_KMS("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
-		      reqs->topology->num_lm, reqs->topology->num_ctl,
-		      reqs->topology->top_name,
-		      reqs->topology->needs_split_display);
+	DPU_DEBUG("top_ctrl: 0x%llX\n", reqs->top_ctrl);
+	DPU_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
+			reqs->topology->num_lm, reqs->topology->num_ctl,
+			reqs->topology->top_name,
+			reqs->topology->needs_split_display);
 
 	return 0;
 }