| Message ID | 20180904005737.5346-1-imirkin@alum.mit.edu (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/nouveau: add basic HDMI 2.0 support | expand |
On Tue, 4 Sep 2018 at 10:59, Ilia Mirkin <imirkin@alum.mit.edu> wrote: > > This is the beginnings of HDMI 2.0 support. All of the "extra" > features are left out, such as 12/16bpc, YUV420, etc. > > I've verified that with this code, a GP108 (GT1030) can switch between > 4k@60 and 1920x1080@60 on a LG 4K TV. Further, I've verified via i2c > tools, that the SCDC writes really do happen. > > I suspect that the patch for keeping track of the high-speed TMDS > setting is somehow off, esp if one were to switch between HDMI and DVI > on the same port, or DP and HDMI. I'm quite confused about OR's vs > HEAD's, and how to tell whether a register is indexed by one or the > other. But at least it works a little bit! I think the main thing you need to make that switching work is to ensure the hdmi disable path reverts the scdc settings, which, I think is already taken care of with your series. HEAD is "CRTC", the thing that scans out the image from the FB. OR is the "output resource", responsible for encoding in the target display protocol. It's a bit confusing, because there's a bunch of HW that is different between generations where certain things (like HDMI control, for example) that used to be tied to the OR, but is now tied to the HEAD. Overall, I think the series looks fine so far. Ben. > > Note that I have limited testing equipment, but I did verify that a > GM204 trace referred to the same register for controlling > scrambling. I may get access to a GM206 later in the week to verify > there. > > Ilia Mirkin (5): > drm/nouveau/disp: add a way to configure scrambling/tmds for hdmi 2.0 > drm/nouveau/disp/gm200-: add scdc parameter setter > drm/nouveau/disp: keep track of high-speed state, program into clock > drm/nouveau/disp: add support for setting scdc parameters for high > modes > drm/nouveau/disp: take sink support into account for exposing 594mhz > > drivers/gpu/drm/nouveau/dispnv50/disp.c | 40 +++++++++++++++++++++- > drivers/gpu/drm/nouveau/include/nvif/cl5070.h | 5 ++- > drivers/gpu/drm/nouveau/nouveau_connector.c | 34 +++++++++++------- > drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 1 + > .../gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c | 36 +++++++++++++++++++ > drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | 8 +++++ > .../gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c | 10 ++++-- > .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 11 +++--- > .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 1 + > .../gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c | 1 + > 10 files changed, 127 insertions(+), 20 deletions(-) > create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c > > -- > 2.16.4 > > _______________________________________________ > Nouveau mailing list > Nouveau@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/nouveau
This is the beginnings of HDMI 2.0 support. All of the "extra" features are left out, such as 12/16bpc, YUV420, etc. I've verified that with this code, a GP108 (GT1030) can switch between 4k@60 and 1920x1080@60 on a LG 4K TV. Further, I've verified via i2c tools, that the SCDC writes really do happen. I suspect that the patch for keeping track of the high-speed TMDS setting is somehow off, esp if one were to switch between HDMI and DVI on the same port, or DP and HDMI. I'm quite confused about OR's vs HEAD's, and how to tell whether a register is indexed by one or the other. But at least it works a little bit! Note that I have limited testing equipment, but I did verify that a GM204 trace referred to the same register for controlling scrambling. I may get access to a GM206 later in the week to verify there. Ilia Mirkin (5): drm/nouveau/disp: add a way to configure scrambling/tmds for hdmi 2.0 drm/nouveau/disp/gm200-: add scdc parameter setter drm/nouveau/disp: keep track of high-speed state, program into clock drm/nouveau/disp: add support for setting scdc parameters for high modes drm/nouveau/disp: take sink support into account for exposing 594mhz drivers/gpu/drm/nouveau/dispnv50/disp.c | 40 +++++++++++++++++++++- drivers/gpu/drm/nouveau/include/nvif/cl5070.h | 5 ++- drivers/gpu/drm/nouveau/nouveau_connector.c | 34 +++++++++++------- drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 1 + .../gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c | 36 +++++++++++++++++++ drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | 8 +++++ .../gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c | 10 ++++-- .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 11 +++--- .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 1 + .../gpu/drm/nouveau/nvkm/engine/disp/sorgv100.c | 1 + 10 files changed, 127 insertions(+), 20 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c