mbox series

[v6,00/19] clean up DPU for RM refactor

Message ID 1536366267-22336-1-git-send-email-jsanka@codeaurora.org (mailing list archive)
Headers show
Series clean up DPU for RM refactor | expand

Message

Jeykumar Sankaran Sept. 8, 2018, 12:24 a.m. UTC
Based on the comments received for the patch series[1] and to
make the review process a bit more easy, spliting up the 
patches for cleanup and resource manager refactor. This series 
cleans up and prepares the DPU for upcoming RM changes.

[1] https://patchwork.freedesktop.org/series/44669/

changes in v4:
	- split clean up changes in separate commits
changes in v5:
	- clean up dead code in RM
	- remove both topology enums and RM specific topology
	- update commit texts with reasons for removal
changes in v6:
	- remove parameter checks in RM reserve
	- use BIT(x) to define power handle event macros
	- avoid head allocation for RM topology

Thanks and Regards,
Jeykumar S.

Jeykumar Sankaran (19):
  drm/msm/dpu: remove debugfs support for misr
  drm/msm/dpu: squash power handle event types
  drm/msm/dpu: remove scalar config definitions
  drm/msm/dpu: remove resource pool manager
  drm/msm/dpu: remove ping pong split topology variables
  drm/msm/dpu: enable master-slave encoders explicitly
  drm/msm/dpu: use kms stored hw mdp block
  drm/msm/dpu: iterate for assigned hw ctl in virtual encoder
  drm/msm/dpu: avoid querying for hw intf before assignment
  drm/msm/dpu: make crtc get_mixer_width helper static
  drm/msm/dpu: move hw resource tracking to crtc state
  drm/msm/dpu: rename hw_ctl to lm_ctl
  drm/msm/dpu: clean up destination scaler residue
  drm/msm/dpu: remove cdm block support from resource manager
  drm/msm/dpu: remove LOCK/CLEAR support in RM
  drm/msm/dpu: remove display H_TILE from encoder
  drm/msm/dpu: remove RM dependency on connector state
  drm/msm/dpu: relax parameter validation in encoders
  drm/msm/dpu: remove RM topology definition

 drivers/gpu/drm/msm/Makefile                       |   1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c           | 467 +++------------------
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h           | 111 +----
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c        | 216 ++--------
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h        |  10 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h   |  23 +-
 .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c   |  48 +--
 .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c   | 125 +-----
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  56 +--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |  56 ---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c         | 323 --------------
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h         | 139 ------
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c         |  14 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h         |   4 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c        |  29 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h        |   7 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c          |  29 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h          |   7 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h        |  33 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c         |  18 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h         |  17 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c        |   3 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h        |  16 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |   8 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c   |  15 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h   |  14 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c             | 285 +++----------
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h             |  44 --
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h          |   4 -
 29 files changed, 214 insertions(+), 1908 deletions(-)
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c
 delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h

Comments

Sean Paul Sept. 11, 2018, 6:20 p.m. UTC | #1
On Fri, Sep 07, 2018 at 05:24:08PM -0700, Jeykumar Sankaran wrote:
> Based on the comments received for the patch series[1] and to
> make the review process a bit more easy, spliting up the 
> patches for cleanup and resource manager refactor. This series 
> cleans up and prepares the DPU for upcoming RM changes.
> 
> [1] https://patchwork.freedesktop.org/series/44669/
> 
> changes in v4:
> 	- split clean up changes in separate commits
> changes in v5:
> 	- clean up dead code in RM
> 	- remove both topology enums and RM specific topology
> 	- update commit texts with reasons for removal
> changes in v6:
> 	- remove parameter checks in RM reserve
> 	- use BIT(x) to define power handle event macros
> 	- avoid head allocation for RM topology

Thanks for the revision, I've put the last 3 patches in dpu-staging.

Nice work!

Sean

> 
> Thanks and Regards,
> Jeykumar S.
> 
> Jeykumar Sankaran (19):
>   drm/msm/dpu: remove debugfs support for misr
>   drm/msm/dpu: squash power handle event types
>   drm/msm/dpu: remove scalar config definitions
>   drm/msm/dpu: remove resource pool manager
>   drm/msm/dpu: remove ping pong split topology variables
>   drm/msm/dpu: enable master-slave encoders explicitly
>   drm/msm/dpu: use kms stored hw mdp block
>   drm/msm/dpu: iterate for assigned hw ctl in virtual encoder
>   drm/msm/dpu: avoid querying for hw intf before assignment
>   drm/msm/dpu: make crtc get_mixer_width helper static
>   drm/msm/dpu: move hw resource tracking to crtc state
>   drm/msm/dpu: rename hw_ctl to lm_ctl
>   drm/msm/dpu: clean up destination scaler residue
>   drm/msm/dpu: remove cdm block support from resource manager
>   drm/msm/dpu: remove LOCK/CLEAR support in RM
>   drm/msm/dpu: remove display H_TILE from encoder
>   drm/msm/dpu: remove RM dependency on connector state
>   drm/msm/dpu: relax parameter validation in encoders
>   drm/msm/dpu: remove RM topology definition
> 
>  drivers/gpu/drm/msm/Makefile                       |   1 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c           | 467 +++------------------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h           | 111 +----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c        | 216 ++--------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h        |  10 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h   |  23 +-
>  .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c   |  48 +--
>  .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c   | 125 +-----
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  56 +--
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |  56 ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c         | 323 --------------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h         | 139 ------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c         |  14 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h         |   4 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c        |  29 --
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h        |   7 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c          |  29 --
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h          |   7 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h        |  33 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c         |  18 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h         |  17 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c        |   3 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h        |  16 -
>  drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |   8 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c   |  15 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h   |  14 +-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c             | 285 +++----------
>  drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h             |  44 --
>  drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h          |   4 -
>  29 files changed, 214 insertions(+), 1908 deletions(-)
>  delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c
>  delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.h
> 
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>