diff mbox series

drm/i915: Apply correct ddi translation table for AML device

Message ID 1537867238-26364-1-git-send-email-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Apply correct ddi translation table for AML device | expand

Commit Message

Lee, Shawn C Sept. 25, 2018, 9:20 a.m. UTC
Amber Lake used the same gen graphics as Kaby Lake. Kernel driver
should configure KBL's DDI buffer setting for AML ULX as well.

So far, driver would load DDI translation table that used for
KBL H/S platform and apply it on AML devices. But AML is belong to
ULX series. This change will lead driver to apply KBL-Y's DDI table
for AML devices to avoid unexpected eDP/DP signal quality issue.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Souza, Jose Sept. 25, 2018, 9:20 p.m. UTC | #1
On Tue, 2018-09-25 at 02:20 -0700, Lee, Shawn C wrote:
> Amber Lake used the same gen graphics as Kaby Lake. Kernel driver
> should configure KBL's DDI buffer setting for AML ULX as well.
> 
> So far, driver would load DDI translation table that used for
> KBL H/S platform and apply it on AML devices. But AML is belong to
> ULX series. This change will lead driver to apply KBL-Y's DDI table
> for AML devices to avoid unexpected eDP/DP signal quality issue.
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jose Roberto de Souza <jose.souza@intel.com>

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

But I guess CI will fail in this patch as looks like you send the first
one separated from this one.

> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index b6910c8b4e08..b051970912a3 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -642,7 +642,7 @@ skl_get_buf_trans_dp(struct drm_i915_private
> *dev_priv, int *n_entries)
>  static const struct ddi_buf_trans *
>  kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int
> *n_entries)
>  {
> -	if (IS_KBL_ULX(dev_priv)) {
> +	if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
>  		*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
>  		return kbl_y_ddi_translations_dp;
>  	} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) {
> @@ -658,7 +658,7 @@ static const struct ddi_buf_trans *
>  skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int
> *n_entries)
>  {
>  	if (dev_priv->vbt.edp.low_vswing) {
> -		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
> +		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> IS_AML_ULX(dev_priv)) {
>  			*n_entries =
> ARRAY_SIZE(skl_y_ddi_translations_edp);
>  			return skl_y_ddi_translations_edp;
>  		} else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv)
> ||
> @@ -680,7 +680,7 @@ skl_get_buf_trans_edp(struct drm_i915_private
> *dev_priv, int *n_entries)
>  static const struct ddi_buf_trans *
>  skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int
> *n_entries)
>  {
> -	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
> +	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
> IS_AML_ULX(dev_priv)) {
>  		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
>  		return skl_y_ddi_translations_hdmi;
>  	} else {
Lee, Shawn C Sept. 26, 2018, 1:59 a.m. UTC | #2
On Tue, 2018-09-25 at 21:20, Souza, Jose wrote:
>> Amber Lake used the same gen graphics as Kaby Lake. Kernel driver 
>> should configure KBL's DDI buffer setting for AML ULX as well.
>> 
>> So far, driver would load DDI translation table that used for KBL H/S 
>> platform and apply it on AML devices. But AML is belong to ULX series. 
>> This change will lead driver to apply KBL-Y's DDI table for AML 
>> devices to avoid unexpected eDP/DP signal quality issue.
>> 
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Jose Roberto de Souza <jose.souza@intel.com>
>
>Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
>
>But I guess CI will fail in this patch as looks like you send the first one separated from this one.
>

Yes, it depends on https://patchwork.kernel.org/patch/10613643/.

>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index b6910c8b4e08..b051970912a3 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -642,7 +642,7 @@ skl_get_buf_trans_dp(struct drm_i915_private 
>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans *  
>> kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int
>> *n_entries)
>>  {
>> -	if (IS_KBL_ULX(dev_priv)) {
>> +	if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
>>  		*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
>>  		return kbl_y_ddi_translations_dp;
>>  	} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) { @@ -658,7 
>> +658,7 @@ static const struct ddi_buf_trans *  
>> skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int
>> *n_entries)
>>  {
>>  	if (dev_priv->vbt.edp.low_vswing) {
>> -		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>> +		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>> IS_AML_ULX(dev_priv)) {
>>  			*n_entries =
>> ARRAY_SIZE(skl_y_ddi_translations_edp);
>>  			return skl_y_ddi_translations_edp;
>>  		} else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv)
>> ||
>> @@ -680,7 +680,7 @@ skl_get_buf_trans_edp(struct drm_i915_private 
>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans *  
>> skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int
>> *n_entries)
>>  {
>> -	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>> +	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>> IS_AML_ULX(dev_priv)) {
>>  		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
>>  		return skl_y_ddi_translations_hdmi;
>>  	} else {
kernel test robot Sept. 26, 2018, 5:52 p.m. UTC | #3
Hi Shawn,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.19-rc5 next-20180926]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Lee-Shawn-C/drm-i915-Apply-correct-ddi-translation-table-for-AML-device/20180925-190446
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-s2-201838 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/gpu//drm/i915/intel_ddi.c: In function 'kbl_get_buf_trans_dp':
>> drivers/gpu//drm/i915/intel_ddi.c:645:30: error: implicit declaration of function 'IS_AML_ULX' [-Werror=implicit-function-declaration]
     if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
                                 ^~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/IS_AML_ULX +645 drivers/gpu//drm/i915/intel_ddi.c

   641	
   642	static const struct ddi_buf_trans *
   643	kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
   644	{
 > 645		if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
   646			*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
   647			return kbl_y_ddi_translations_dp;
   648		} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) {
   649			*n_entries = ARRAY_SIZE(kbl_u_ddi_translations_dp);
   650			return kbl_u_ddi_translations_dp;
   651		} else {
   652			*n_entries = ARRAY_SIZE(kbl_ddi_translations_dp);
   653			return kbl_ddi_translations_dp;
   654		}
   655	}
   656	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
kernel test robot Sept. 26, 2018, 9:05 p.m. UTC | #4
Hi Shawn,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.19-rc5 next-20180926]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Lee-Shawn-C/drm-i915-Apply-correct-ddi-translation-table-for-AML-device/20180925-190446
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-c0-09270251 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All warnings (new ones prefixed by >>):

   In file included from include/linux/string.h:6:0,
                    from include/linux/uuid.h:20,
                    from include/linux/mod_devicetable.h:13,
                    from include/linux/i2c.h:29,
                    from include/drm/drm_scdc_helper.h:27,
                    from drivers/gpu//drm/i915/intel_ddi.c:28:
   drivers/gpu//drm/i915/intel_ddi.c: In function 'kbl_get_buf_trans_dp':
   drivers/gpu//drm/i915/intel_ddi.c:645:30: error: implicit declaration of function 'IS_AML_ULX'; did you mean 'IS_KBL_ULX'? [-Werror=implicit-function-declaration]
     if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
                                 ^
   include/linux/compiler.h:58:30: note: in definition of macro '__trace_if'
     if (__builtin_constant_p(!!(cond)) ? !!(cond) :   \
                                 ^~~~
>> drivers/gpu//drm/i915/intel_ddi.c:645:2: note: in expansion of macro 'if'
     if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
     ^~
   Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls
   Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32
   Cyclomatic Complexity 1 include/linux/err.h:PTR_ERR
   Cyclomatic Complexity 1 include/linux/err.h:IS_ERR
   Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order
   Cyclomatic Complexity 1 arch/x86/include/asm/refcount.h:refcount_dec_and_test
   Cyclomatic Complexity 2 include/linux/kref.h:kref_put
   Cyclomatic Complexity 1 include/drm/drm_scdc_helper.h:drm_scdc_readb
   Cyclomatic Complexity 56 include/linux/slab.h:kmalloc_index
   Cyclomatic Complexity 67 include/linux/slab.h:kmalloc_large
   Cyclomatic Complexity 9 include/linux/slab.h:kmalloc
   Cyclomatic Complexity 1 include/linux/slab.h:kzalloc
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_display.h:transcoder_is_dsi
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/i915_drv.h:to_i915
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/i915_drv.h:intel_info
   Cyclomatic Complexity 3 include/drm/drm_dp_helper.h:drm_dp_enhanced_frame_cap
   Cyclomatic Complexity 1 include/drm/drm_atomic.h:drm_atomic_state_put
   Cyclomatic Complexity 2 drivers/gpu//drm/i915/intel_drv.h:intel_encoder_is_dig_port
   Cyclomatic Complexity 6 drivers/gpu//drm/i915/intel_drv.h:enc_to_dig_port
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_drv.h:enc_to_intel_dp
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_drv.h:dp_to_dig_port
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_drv.h:intel_crtc_has_type
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_drv.h:intel_crtc_has_dp_encoder
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:bxt_get_buf_trans_dp
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:bxt_get_buf_trans_hdmi
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_init_dp_buf_reg
   Cyclomatic Complexity 2 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_main_link_aux_domain
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_buf_trans_fdi
   Cyclomatic Complexity 23 drivers/gpu//drm/i915/intel_ddi.c:skl_get_buf_trans_dp
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:skl_buf_trans_num_entries
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:bdw_get_buf_trans_edp
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:bxt_get_buf_trans_edp
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:_skl_ddi_set_iboost
   Cyclomatic Complexity 13 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_clk_disable
   Cyclomatic Complexity 11 drivers/gpu//drm/i915/intel_ddi.c:skl_calc_wrpll_link
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:hsw_pll_to_ddi_pll_sel
   Cyclomatic Complexity 17 drivers/gpu//drm/i915/intel_ddi.c:icl_get_combo_buf_trans
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:cnl_get_buf_trans_dp
   Cyclomatic Complexity 10 drivers/gpu//drm/i915/intel_ddi.c:cnl_get_buf_trans_edp
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:translate_signal_level
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_dp_level
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:cnl_get_buf_trans_hdmi
   Cyclomatic Complexity 20 drivers/gpu//drm/i915/intel_ddi.c:cnl_ddi_vswing_program
   Cyclomatic Complexity 20 drivers/gpu//drm/i915/intel_ddi.c:cnl_ddi_vswing_sequence
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:hsw_ddi_calc_wrpll_link
   Cyclomatic Complexity 16 drivers/gpu//drm/i915/intel_ddi.c:cnl_calc_wrpll_link
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_power_domains
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_compute_output_type
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:icl_ddi_combo_vswing_program
   Cyclomatic Complexity 20 drivers/gpu//drm/i915/intel_ddi.c:icl_combo_phy_ddi_vswing_sequence
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:icl_ddi_vswing_sequence
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:intel_wait_ddi_buf_idle
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:intel_disable_ddi_buf
   Cyclomatic Complexity 25 drivers/gpu//drm/i915/intel_ddi.c:kbl_get_buf_trans_dp
   Cyclomatic Complexity 43 drivers/gpu//drm/i915/intel_ddi.c:skl_get_buf_trans_edp
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_buf_trans_edp
   Cyclomatic Complexity 9 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_buf_trans_dp
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:intel_prepare_dp_ddi_buffers
   Cyclomatic Complexity 7 drivers/gpu//drm/i915/intel_ddi.c:skl_get_buf_trans_hdmi
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_buf_trans_hdmi
   Cyclomatic Complexity 39 drivers/gpu//drm/i915/intel_ddi.c:skl_ddi_set_iboost
   Cyclomatic Complexity 40 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_hdmi_level
   Cyclomatic Complexity 19 drivers/gpu//drm/i915/intel_ddi.c:intel_prepare_hdmi_ddi_buffers
   Cyclomatic Complexity 11 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_crtc_encoder
   Cyclomatic Complexity 20 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_get_hw_state
   Cyclomatic Complexity 19 drivers/gpu//drm/i915/intel_ddi.c:bxt_ddi_vswing_sequence
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_is_audio_enabled
   Cyclomatic Complexity 16 drivers/gpu//drm/i915/intel_ddi.c:ddi_dotclock_get
   Cyclomatic Complexity 15 drivers/gpu//drm/i915/intel_ddi.c:hsw_ddi_clock_get
   Cyclomatic Complexity 10 drivers/gpu//drm/i915/intel_ddi.c:skl_ddi_clock_get
   Cyclomatic Complexity 12 drivers/gpu//drm/i915/intel_ddi.c:cnl_ddi_clock_get
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:bxt_calc_pll_link
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:bxt_ddi_clock_get
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:icl_ddi_clock_get
   Cyclomatic Complexity 13 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_clock_get
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:intel_disable_ddi_hdmi
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:intel_disable_ddi_dp
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:intel_disable_ddi
   Cyclomatic Complexity 12 drivers/gpu//drm/i915/intel_ddi.c:icl_pll_to_ddi_pll_sel
   Cyclomatic Complexity 17 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_clk_select
   Cyclomatic Complexity 1 drivers/gpu//drm/i915/intel_ddi.c:bxt_ddi_pre_pll_enable
   Cyclomatic Complexity 11 drivers/gpu//drm/i915/intel_ddi.c:intel_enable_ddi_hdmi
   Cyclomatic Complexity 11 drivers/gpu//drm/i915/intel_ddi.c:intel_enable_ddi_dp
   Cyclomatic Complexity 6 drivers/gpu//drm/i915/intel_ddi.c:intel_enable_ddi
   Cyclomatic Complexity 10 drivers/gpu//drm/i915/intel_ddi.c:modeset_pipe
   Cyclomatic Complexity 43 drivers/gpu//drm/i915/intel_ddi.c:intel_hdmi_reset_link
   Cyclomatic Complexity 6 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_hotplug
   Cyclomatic Complexity 11 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_a_force_4_lanes
   Cyclomatic Complexity 8 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_max_lanes
   Cyclomatic Complexity 4 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_init_dp_connector
   Cyclomatic Complexity 3 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_init_hdmi_connector
   Cyclomatic Complexity 15 drivers/gpu//drm/i915/intel_ddi.c:hsw_fdi_link_train
   Cyclomatic Complexity 12 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_set_pipe_settings
   Cyclomatic Complexity 5 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_set_vc_payload_alloc
   Cyclomatic Complexity 31 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_enable_transcoder_func
   Cyclomatic Complexity 6 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_disable_transcoder_func
   Cyclomatic Complexity 7 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_toggle_hdcp_signalling
   Cyclomatic Complexity 9 drivers/gpu//drm/i915/intel_ddi.c:intel_ddi_connector_get_hw_state

vim +/if +645 drivers/gpu//drm/i915/intel_ddi.c

   641	
   642	static const struct ddi_buf_trans *
   643	kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
   644	{
 > 645		if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
   646			*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
   647			return kbl_y_ddi_translations_dp;
   648		} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) {
   649			*n_entries = ARRAY_SIZE(kbl_u_ddi_translations_dp);
   650			return kbl_u_ddi_translations_dp;
   651		} else {
   652			*n_entries = ARRAY_SIZE(kbl_ddi_translations_dp);
   653			return kbl_ddi_translations_dp;
   654		}
   655	}
   656	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
Jani Nikula Sept. 27, 2018, 6:34 a.m. UTC | #5
On Wed, 26 Sep 2018, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> On Tue, 2018-09-25 at 21:20, Souza, Jose wrote:
>>> Amber Lake used the same gen graphics as Kaby Lake. Kernel driver 
>>> should configure KBL's DDI buffer setting for AML ULX as well.
>>> 
>>> So far, driver would load DDI translation table that used for KBL H/S 
>>> platform and apply it on AML devices. But AML is belong to ULX series. 
>>> This change will lead driver to apply KBL-Y's DDI table for AML 
>>> devices to avoid unexpected eDP/DP signal quality issue.
>>> 
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Cc: Jose Roberto de Souza <jose.souza@intel.com>
>>
>>Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
>>
>>But I guess CI will fail in this patch as looks like you send the first one separated from this one.
>>
>
> Yes, it depends on https://patchwork.kernel.org/patch/10613643/.

You need to send them together, or have that one merged first.

BR,
Jani.

>
>>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
>>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>>> b/drivers/gpu/drm/i915/intel_ddi.c
>>> index b6910c8b4e08..b051970912a3 100644
>>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>>> @@ -642,7 +642,7 @@ skl_get_buf_trans_dp(struct drm_i915_private 
>>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans *  
>>> kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int
>>> *n_entries)
>>>  {
>>> -	if (IS_KBL_ULX(dev_priv)) {
>>> +	if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
>>>  		*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
>>>  		return kbl_y_ddi_translations_dp;
>>>  	} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) { @@ -658,7 
>>> +658,7 @@ static const struct ddi_buf_trans *  
>>> skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int
>>> *n_entries)
>>>  {
>>>  	if (dev_priv->vbt.edp.low_vswing) {
>>> -		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>>> +		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>>> IS_AML_ULX(dev_priv)) {
>>>  			*n_entries =
>>> ARRAY_SIZE(skl_y_ddi_translations_edp);
>>>  			return skl_y_ddi_translations_edp;
>>>  		} else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv)
>>> ||
>>> @@ -680,7 +680,7 @@ skl_get_buf_trans_edp(struct drm_i915_private 
>>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans *  
>>> skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int
>>> *n_entries)
>>>  {
>>> -	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>>> +	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>>> IS_AML_ULX(dev_priv)) {
>>>  		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
>>>  		return skl_y_ddi_translations_hdmi;
>>>  	} else {
Lee, Shawn C Sept. 27, 2018, 6:52 a.m. UTC | #6
On Thu, 27 Sep 2018, "Jani Nikula" wrote:
>>>> Amber Lake used the same gen graphics as Kaby Lake. Kernel driver 
>>>> should configure KBL's DDI buffer setting for AML ULX as well.
>>>> 
>>>> So far, driver would load DDI translation table that used for KBL 
>>>> H/S platform and apply it on AML devices. But AML is belong to ULX series.
>>>> This change will lead driver to apply KBL-Y's DDI table for AML 
>>>> devices to avoid unexpected eDP/DP signal quality issue.
>>>> 
>>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>> Cc: Jose Roberto de Souza <jose.souza@intel.com>
>>>
>>>Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
>>>
>>>But I guess CI will fail in this patch as looks like you send the first one separated from this one.
>>>
>>
>> Yes, it depends on https://patchwork.kernel.org/patch/10613643/.
>
>You need to send them together, or have that one merged first.
>
>BR,
>Jani.
>

Thanks for reminding! I will send them together in a new series later.

>>
>>>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>>>> ---
>>>>  drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
>>>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>>> 
>>>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>>>> b/drivers/gpu/drm/i915/intel_ddi.c
>>>> index b6910c8b4e08..b051970912a3 100644
>>>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>>>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>>>> @@ -642,7 +642,7 @@ skl_get_buf_trans_dp(struct drm_i915_private 
>>>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans * 
>>>> kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int
>>>> *n_entries)
>>>>  {
>>>> -	if (IS_KBL_ULX(dev_priv)) {
>>>> +	if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
>>>>  		*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
>>>>  		return kbl_y_ddi_translations_dp;
>>>>  	} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) { @@ 
>>>> -658,7
>>>> +658,7 @@ static const struct ddi_buf_trans *
>>>> skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int
>>>> *n_entries)
>>>>  {
>>>>  	if (dev_priv->vbt.edp.low_vswing) {
>>>> -		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>>>> +		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>>>> IS_AML_ULX(dev_priv)) {
>>>>  			*n_entries =
>>>> ARRAY_SIZE(skl_y_ddi_translations_edp);
>>>>  			return skl_y_ddi_translations_edp;
>>>>  		} else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv)
>>>> ||
>>>> @@ -680,7 +680,7 @@ skl_get_buf_trans_edp(struct drm_i915_private 
>>>> *dev_priv, int *n_entries)  static const struct ddi_buf_trans * 
>>>> skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int
>>>> *n_entries)
>>>>  {
>>>> -	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
>>>> +	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) ||
>>>> IS_AML_ULX(dev_priv)) {
>>>>  		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
>>>>  		return skl_y_ddi_translations_hdmi;
>>>>  	} else {
>
>--
>Jani Nikula, Intel Open Source Graphics Center
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b6910c8b4e08..b051970912a3 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -642,7 +642,7 @@  skl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
 static const struct ddi_buf_trans *
 kbl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
 {
-	if (IS_KBL_ULX(dev_priv)) {
+	if (IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
 		*n_entries = ARRAY_SIZE(kbl_y_ddi_translations_dp);
 		return kbl_y_ddi_translations_dp;
 	} else if (IS_KBL_ULT(dev_priv) || IS_CFL_ULT(dev_priv)) {
@@ -658,7 +658,7 @@  static const struct ddi_buf_trans *
 skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
 {
 	if (dev_priv->vbt.edp.low_vswing) {
-		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
+		if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
 			*n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp);
 			return skl_y_ddi_translations_edp;
 		} else if (IS_SKL_ULT(dev_priv) || IS_KBL_ULT(dev_priv) ||
@@ -680,7 +680,7 @@  skl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
 static const struct ddi_buf_trans *
 skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries)
 {
-	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv)) {
+	if (IS_SKL_ULX(dev_priv) || IS_KBL_ULX(dev_priv) || IS_AML_ULX(dev_priv)) {
 		*n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi);
 		return skl_y_ddi_translations_hdmi;
 	} else {