| Message ID | 1539245630-26611-3-git-send-email-yogeshnarayan.gaur@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mtd: spi-nor: add entry for mt35xu512aba flash | expand |
On 10/11/2018 11:15 AM, Yogesh Narayan Gaur wrote: > Add entry for mt35xu512aba Micron NOR flash. > This flash is having uniform sector erase size of 128KB, have > support of FSR(flag status register), flash size is 64MB and > supports 4-byte commands. > > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> > --- > Changes for v2: > - Removed checkpatch warning, 80 character limit. > > drivers/mtd/spi-nor/spi-nor.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index b8b494f..e0d95ac 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1405,6 +1405,10 @@ static const struct flash_info spi_nor_ids[] = { > { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > > + /* Micron */ > + { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512, > + SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES) }, > + The style is slightly different from what Brian proposed back in 9648388fc7737365be7a8092e77df78ccc2cd1a4. For consistency reasons, I think we should use the same style in all entries. Since I verified the correctness of the patch and my comment targets just a cosmetic change, I'll let the maintainers decide: Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Hi Tudor, > -----Original Message----- > From: Tudor Ambarus [mailto:tudor.ambarus@microchip.com] > Sent: Thursday, October 11, 2018 9:33 PM > To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; linux- > mtd@lists.infradead.org; linux-spi@vger.kernel.org > Cc: marek.vasut@gmail.com; cyrille.pitchen@wedev4u.fr; > boris.brezillon@bootlin.com; computersforpeace@gmail.com; > frieder.schrempf@exceet.de; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v2 2/2] mtd: spi-nor: add entry for mt35xu512aba flash > > > > On 10/11/2018 11:15 AM, Yogesh Narayan Gaur wrote: > > Add entry for mt35xu512aba Micron NOR flash. > > This flash is having uniform sector erase size of 128KB, have support > > of FSR(flag status register), flash size is 64MB and supports 4-byte > > commands. > > > > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> > > --- > > Changes for v2: > > - Removed checkpatch warning, 80 character limit. > > > > drivers/mtd/spi-nor/spi-nor.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c > > b/drivers/mtd/spi-nor/spi-nor.c index b8b494f..e0d95ac 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -1405,6 +1405,10 @@ static const struct flash_info spi_nor_ids[] = { > > { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR > | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > > { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | > USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > > > > + /* Micron */ > > + { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512, > > + SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES) }, > > + > > The style is slightly different from what Brian proposed back in > 9648388fc7737365be7a8092e77df78ccc2cd1a4. For consistency reasons, I think > we should use the same style in all entries. > Ok, I have send the next version of the patches with the style changes as proposed by Brian. -- Regards Yogesh Gaur. > Since I verified the correctness of the patch and my comment targets just a > cosmetic change, I'll let the maintainers decide: > > Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index b8b494f..e0d95ac 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1405,6 +1405,10 @@ static const struct flash_info spi_nor_ids[] = { { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + /* Micron */ + { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512, + SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES) }, + /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
Add entry for mt35xu512aba Micron NOR flash. This flash is having uniform sector erase size of 128KB, have support of FSR(flag status register), flash size is 64MB and supports 4-byte commands. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> --- Changes for v2: - Removed checkpatch warning, 80 character limit. drivers/mtd/spi-nor/spi-nor.c | 4 ++++ 1 file changed, 4 insertions(+)