| Message ID | 20181016220133.26991-3-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | More watermarks improvements | expand |
On Tue, Oct 16, 2018 at 03:01:24PM -0700, Paulo Zanoni wrote: > This reduces the size of struct skl_wm_level from 6 to 4, which > reduces the size of struct skl_plane_wm from 104 to 70, which reduces > the size of struct skl_pipe_wm from 524 to 356. A reduction of 168 > padding bytes per pipe. This will increase even more the next time we > bump I915_MAX_PLANES. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> For completeness: $ pahole -s -C skl_wm_level drivers/gpu/drm/i915/i915.o struct skl_wm_level { bool plane_en; /* 0 1 */ /* XXX 1 byte hole, try to pack */ uint16_t plane_res_b; /* 2 2 */ uint8_t plane_res_l; /* 4 1 */ /* size: 6, cachelines: 1, members: 3 */ /* sum members: 4, holes: 1, sum holes: 1 */ /* padding: 1 */ /* last cacheline: 6 bytes */ }; So yes, this removes the padding and hole that are there due to alignment. Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 3017ef037fed..3616b718b5d2 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1243,9 +1243,9 @@ struct skl_ddb_values { > }; > > struct skl_wm_level { > - bool plane_en; > uint16_t plane_res_b; > uint8_t plane_res_l; > + bool plane_en; > }; > > /* Stores plane specific WM parameters */ > -- > 2.14.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3017ef037fed..3616b718b5d2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1243,9 +1243,9 @@ struct skl_ddb_values { }; struct skl_wm_level { - bool plane_en; uint16_t plane_res_b; uint8_t plane_res_l; + bool plane_en; }; /* Stores plane specific WM parameters */
This reduces the size of struct skl_wm_level from 6 to 4, which reduces the size of struct skl_plane_wm from 104 to 70, which reduces the size of struct skl_pipe_wm from 524 to 356. A reduction of 168 padding bytes per pipe. This will increase even more the next time we bump I915_MAX_PLANES. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)