Message ID | 1540996688-23681-4-git-send-email-aisheng.dong@nxp.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | ARM: imx: add imx7ulp support | expand |
On Wed, Oct 31, 2018 at 3:43 PM A.s. Dong <aisheng.dong@nxp.com> wrote: > On some SoCs(e.g. MX7ULP), GPIO clock is gatable and maybe > disabled by default. Users have to make sure it's enabled before > being able to access controller registers, otherwise an external > abort error may occur. Let's add the optional clocks property to > handle this case. > > For ULP GPIO clock, it includes two separate clocks: one is for > GPIO controller Input/Output function clock while another is > GPIO port control clock for interrupt function. > > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Stefan Agner <stefan@agner.ch> > Cc: linux-gpio@vger.kernel.org > Cc: devicetree@vger.kernel.org > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Patch applied. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt index 0ccbae4..ae254aa 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt @@ -24,6 +24,12 @@ Required properties for GPIO node: 4 = active high level-sensitive. 8 = active low level-sensitive. +Optional properties: +-clocks: Must contain an entry for each entry in clock-names. + See common clock-bindings.txt for details. +-clock-names: A list of clock names. For imx7ulp, it must contain + "gpio", "port". + Note: Each GPIO port should have an alias correctly numbered in "aliases" node.