diff mbox series

[1/2] arm64: dts: r8a77990: Add SDHI device nodes

Message ID 20181105214117.11734-1-marek.vasut+renesas@gmail.com (mailing list archive)
State Changes Requested
Delegated to: Simon Horman
Headers show
Series [1/2] arm64: dts: r8a77990: Add SDHI device nodes | expand

Commit Message

Marek Vasut Nov. 5, 2018, 9:41 p.m. UTC
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Simon Horman <horms+renesas@verge.net.au>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/renesas/r8a77990.dtsi | 36 +++++++++++++++++++++++
 1 file changed, 36 insertions(+)

Comments

Yoshihiro Shimoda Nov. 6, 2018, 5:26 a.m. UTC | #1
Hello Marek-san,

> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
> 
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> 
> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
> 
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Simon Horman <horms+renesas@verge.net.au>
> Cc: Wolfram Sang <wsa@the-dreams.de>
> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Cc: linux-renesas-soc@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> ---

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.

Best regards,
Yoshihiro Shimoda
Marek Vasut Nov. 6, 2018, 9:42 a.m. UTC | #2
On 11/06/2018 06:26 AM, Yoshihiro Shimoda wrote:
> Hello Marek-san,

Hello Shimoda-san,

>> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
>>
>> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>>
>> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
>>
>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
>> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
>> Cc: Simon Horman <horms+renesas@verge.net.au>
>> Cc: Wolfram Sang <wsa@the-dreams.de>
>> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>> Cc: linux-renesas-soc@vger.kernel.org
>> Cc: linux-arm-kernel@lists.infradead.org
>> ---
> 
> Thank you for the patch!
> 
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> 
> I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.

I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is
enabling SDHI on a particular board, which I think should be separate.
Geert Uytterhoeven Nov. 6, 2018, 10:35 a.m. UTC | #3
Hi Marek,

On Tue, Nov 6, 2018 at 11:32 AM Marek Vasut <marek.vasut@gmail.com> wrote:
> On 11/06/2018 06:26 AM, Yoshihiro Shimoda wrote:
> >> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
> >>
> >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >>
> >> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
> >>
> >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> >> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
> >> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> >> Cc: Simon Horman <horms+renesas@verge.net.au>
> >> Cc: Wolfram Sang <wsa@the-dreams.de>
> >> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >> Cc: linux-renesas-soc@vger.kernel.org
> >> Cc: linux-arm-kernel@lists.infradead.org
> >> ---
> >
> > Thank you for the patch!
> >
> > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >
> > I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
>
> I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is
> enabling SDHI on a particular board, which I think should be separate.

The arm-soc maintainers tend to disagree, that's why Shimoda-san asked
to combine them.

Gr{oetje,eeting}s,

                        Geert
Simon Horman Nov. 6, 2018, 12:17 p.m. UTC | #4
On Tue, Nov 06, 2018 at 11:35:13AM +0100, Geert Uytterhoeven wrote:
> Hi Marek,
> 
> On Tue, Nov 6, 2018 at 11:32 AM Marek Vasut <marek.vasut@gmail.com> wrote:
> > On 11/06/2018 06:26 AM, Yoshihiro Shimoda wrote:
> > >> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
> > >>
> > >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > >>
> > >> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
> > >>
> > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> > >> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
> > >> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> > >> Cc: Simon Horman <horms+renesas@verge.net.au>
> > >> Cc: Wolfram Sang <wsa@the-dreams.de>
> > >> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > >> Cc: linux-renesas-soc@vger.kernel.org
> > >> Cc: linux-arm-kernel@lists.infradead.org
> > >> ---
> > >
> > > Thank you for the patch!
> > >
> > > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > >
> > > I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
> >
> > I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is
> > enabling SDHI on a particular board, which I think should be separate.
> 
> The arm-soc maintainers tend to disagree, that's why Shimoda-san asked
> to combine them.

That is also my understanding.
Please consider combining these patches.
Marek Vasut Nov. 6, 2018, 8:47 p.m. UTC | #5
On 11/06/2018 11:35 AM, Geert Uytterhoeven wrote:
> Hi Marek,

Hi,

> On Tue, Nov 6, 2018 at 11:32 AM Marek Vasut <marek.vasut@gmail.com> wrote:
>> On 11/06/2018 06:26 AM, Yoshihiro Shimoda wrote:
>>>> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
>>>>
>>>> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>>>>
>>>> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
>>>>
>>>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>>>> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
>>>> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
>>>> Cc: Simon Horman <horms+renesas@verge.net.au>
>>>> Cc: Wolfram Sang <wsa@the-dreams.de>
>>>> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>>>> Cc: linux-renesas-soc@vger.kernel.org
>>>> Cc: linux-arm-kernel@lists.infradead.org
>>>> ---
>>>
>>> Thank you for the patch!
>>>
>>> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>>>
>>> I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
>>
>> I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is
>> enabling SDHI on a particular board, which I think should be separate.
> 
> The arm-soc maintainers tend to disagree, that's why Shimoda-san asked
> to combine them.

Combined patch is out.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 9509dc05665f..fb0818d07cdb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -826,6 +826,42 @@ 
 			status = "disabled";
 		};
 
+		sdhi0: sd@ee100000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee100000 0 0x2000>;
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 314>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 314>;
+			status = "disabled";
+		};
+
+		sdhi1: sd@ee120000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee120000 0 0x2000>;
+			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 313>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 313>;
+			status = "disabled";
+		};
+
+		sdhi3: sd@ee160000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee160000 0 0x2000>;
+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 311>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 311>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;