| Message ID | 20181106204647.18051-1-marek.vasut+renesas@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V3] arm64: dts: r8a77990: ebisu: Add and enable SDHI device nodes | expand |
On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC > and enables SD card slot connected to SDHI0, micro SD card slot > connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board > using the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Out of curiosity: have you tested HS400 on that board based on Niklas' recent patches as well?
On 11/07/2018 09:50 AM, Wolfram Sang wrote: > On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote: >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> >> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC >> and enables SD card slot connected to SDHI0, micro SD card slot >> connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board >> using the R8A77990 SoC. >> >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > > Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > > Out of curiosity: have you tested HS400 on that board based on Niklas' > recent patches as well? Nope. I tried that patchset on M3N again yesterday and got error -84 while initing the eMMC, so I need to look into that first. Then I'll try it on E3.
On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC > and enables SD card slot connected to SDHI0, micro SD card slot > connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board > using the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > Cc: Geert Uytterhoeven <geert+renesas@glider.be> > Cc: Simon Horman <horms+renesas@verge.net.au> > Cc: Wolfram Sang <wsa@the-dreams.de> > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Cc: linux-renesas-soc@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > --- > V2: - Deduplicated regular and UHS pins > - Added sdhi3_ds pin pinmux > V3: - Squash two patches, one adding SDHI nodes to R8A77990 E3 DTSI > and another enabling them on E3 Ebisu, together. > --- > .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 130 ++++++++++++++++++ > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 36 +++++ > 2 files changed, 166 insertions(+) Thanks, applied for v4.21.
> Nope. I tried that patchset on M3N again yesterday and got error -84 > while initing the eMMC, so I need to look into that first. Then I'll > try it on E3. Hmmm, we tried M3N at the hackfest and it worked great there. First idea: are you sure you have all depending patch series applied as well? @Niklas: Have you/can you push a publich branch out with everything included.
On 11/07/2018 02:08 PM, Wolfram Sang wrote: > >> Nope. I tried that patchset on M3N again yesterday and got error -84 >> while initing the eMMC, so I need to look into that first. Then I'll >> try it on E3. > > Hmmm, we tried M3N at the hackfest and it worked great there. > > First idea: are you sure you have all depending patch series applied as > well? > > @Niklas: Have you/can you push a publich branch out with everything > included. We discussed this on IRC already, which is why I need to look into that. The HS200 works well on the M3N though.
> We discussed this on IRC already, which is why I need to look into that. > The HS200 works well on the M3N though. Can you push the branch you used somewhere? I retested the branch from Dunbar with my M3N and it works fine with my tests.
On 11/07/2018 08:23 PM, Wolfram Sang wrote: > >> We discussed this on IRC already, which is why I need to look into that. >> The HS200 works well on the M3N though. > > Can you push the branch you used somewhere? I retested the branch from > Dunbar with my M3N and it works fine with my tests. Sure. btw I think this might even have something to do with ATF 1.0.24 or mainline U-Boot, which switches the eMMC card to HS200 mode.
On Tue, Nov 6, 2018 at 9:46 PM Marek Vasut <marek.vasut@gmail.com> wrote:
> Subject: [PATCH V3] arm64: dts: r8a77990: ebisu: Add and enable SDHI device nodes
arm64: dts: renesas: r8a77990: ebisu: Add and enable SDHI device nodes
Gr{oetje,eeting}s,
Geert
On Thu, Nov 08, 2018 at 01:00:11PM +0100, Geert Uytterhoeven wrote: > On Tue, Nov 6, 2018 at 9:46 PM Marek Vasut <marek.vasut@gmail.com> wrote: > > Subject: [PATCH V3] arm64: dts: r8a77990: ebisu: Add and enable SDHI device nodes > > arm64: dts: renesas: r8a77990: ebisu: Add and enable SDHI device nodes Thanks, fixed.
Hi Marek, On Tue, Nov 6, 2018 at 9:46 PM Marek Vasut <marek.vasut@gmail.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC > and enables SD card slot connected to SDHI0, micro SD card slot > connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board > using the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > @@ -129,6 +129,15 @@ > }; > }; > > + reg_1p8v: regulator0 { > + compatible = "regulator-fixed"; > + regulator-name = "fixed-1.8V"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-boot-on; > + regulator-always-on; > + }; > + > reg_3p3v: regulator1 { > compatible = "regulator-fixed"; > regulator-name = "fixed-3.3V"; > @@ -180,6 +189,54 @@ > #clock-cells = <0>; > clock-frequency = <74250000>; > }; > + > + vcc_sdhi0: regulator-vcc-sdhi0 { > + compatible = "regulator-fixed"; > + > + regulator-name = "SDHI0 Vcc"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + vccq_sdhi0: regulator-vccq-sdhi0 { > + compatible = "regulator-gpio"; > + > + regulator-name = "SDHI0 VccQ"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + > + gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; > + gpios-states = <1>; > + states = <3300000 1 > + 1800000 0>; I know this is how it's done in the example in Documentation/devicetree/bindings/regulator/gpio-regulator.txt, but usually brackets are used to group tuples, like: states = <3300000 1>, <1800000 0>; Perhaps the example should be changed? Gr{oetje,eeting}s, Geert
On 11/20/2018 11:16 AM, Geert Uytterhoeven wrote: > Hi Marek, Hi, > On Tue, Nov 6, 2018 at 9:46 PM Marek Vasut <marek.vasut@gmail.com> wrote: >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> >> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC >> and enables SD card slot connected to SDHI0, micro SD card slot >> connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board >> using the R8A77990 SoC. >> >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > >> --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts >> +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts >> @@ -129,6 +129,15 @@ >> }; >> }; >> >> + reg_1p8v: regulator0 { >> + compatible = "regulator-fixed"; >> + regulator-name = "fixed-1.8V"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-boot-on; >> + regulator-always-on; >> + }; >> + >> reg_3p3v: regulator1 { >> compatible = "regulator-fixed"; >> regulator-name = "fixed-3.3V"; >> @@ -180,6 +189,54 @@ >> #clock-cells = <0>; >> clock-frequency = <74250000>; >> }; >> + >> + vcc_sdhi0: regulator-vcc-sdhi0 { >> + compatible = "regulator-fixed"; >> + >> + regulator-name = "SDHI0 Vcc"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + >> + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; >> + enable-active-high; >> + }; >> + >> + vccq_sdhi0: regulator-vccq-sdhi0 { >> + compatible = "regulator-gpio"; >> + >> + regulator-name = "SDHI0 VccQ"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <3300000>; >> + >> + gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; >> + gpios-states = <1>; >> + states = <3300000 1 >> + 1800000 0>; > > I know this is how it's done in the example in > Documentation/devicetree/bindings/regulator/gpio-regulator.txt, > but usually brackets are used to group tuples, like: > > states = <3300000 1>, <1800000 0>; > > Perhaps the example should be changed? Well, looking through the DTS, I don't see anyone using tuples for the GPIO regulator states. Then again, it could be updated. +CC Mark and Liam, let's see what their opinion on changing that is.
On Wed, Nov 21, 2018 at 12:33 AM Marek Vasut <marek.vasut@gmail.com> wrote: > On 11/20/2018 11:16 AM, Geert Uytterhoeven wrote: > > On Tue, Nov 6, 2018 at 9:46 PM Marek Vasut <marek.vasut@gmail.com> wrote: > >> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > >> > >> This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC > >> and enables SD card slot connected to SDHI0, micro SD card slot > >> connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board > >> using the R8A77990 SoC. > >> > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > >> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > >> @@ -129,6 +129,15 @@ > >> }; > >> }; > >> > >> + reg_1p8v: regulator0 { > >> + compatible = "regulator-fixed"; > >> + regulator-name = "fixed-1.8V"; > >> + regulator-min-microvolt = <1800000>; > >> + regulator-max-microvolt = <1800000>; > >> + regulator-boot-on; > >> + regulator-always-on; > >> + }; > >> + > >> reg_3p3v: regulator1 { > >> compatible = "regulator-fixed"; > >> regulator-name = "fixed-3.3V"; > >> @@ -180,6 +189,54 @@ > >> #clock-cells = <0>; > >> clock-frequency = <74250000>; > >> }; > >> + > >> + vcc_sdhi0: regulator-vcc-sdhi0 { > >> + compatible = "regulator-fixed"; > >> + > >> + regulator-name = "SDHI0 Vcc"; > >> + regulator-min-microvolt = <3300000>; > >> + regulator-max-microvolt = <3300000>; > >> + > >> + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; > >> + enable-active-high; > >> + }; > >> + > >> + vccq_sdhi0: regulator-vccq-sdhi0 { > >> + compatible = "regulator-gpio"; > >> + > >> + regulator-name = "SDHI0 VccQ"; > >> + regulator-min-microvolt = <1800000>; > >> + regulator-max-microvolt = <3300000>; > >> + > >> + gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; > >> + gpios-states = <1>; > >> + states = <3300000 1 > >> + 1800000 0>; > > > > I know this is how it's done in the example in > > Documentation/devicetree/bindings/regulator/gpio-regulator.txt, > > but usually brackets are used to group tuples, like: > > > > states = <3300000 1>, <1800000 0>; > > > > Perhaps the example should be changed? > > Well, looking through the DTS, I don't see anyone using tuples for the > GPIO regulator states. Then again, it could be updated. Probably a good idea given the current work on schema validation: DT YAML Encoding ... dts ‘< >’ are maintained ○ Will need to be stricter about these ○ Same for dtb, not for validation: ■ prop = <1 2 3 4>; ■ prop = <1>, <2>, <3>, <4>; https://www.elinux.org/images/6/6b/LPC2018_json-schema_for_Devicetree.pdf Gr{oetje,eeting}s, Geert
On Tue, Nov 06, 2018 at 09:46:47PM +0100, Marek Vasut wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC > and enables SD card slot connected to SDHI0, micro SD card slot > connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board > using the R8A77990 SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > Cc: Geert Uytterhoeven <geert+renesas@glider.be> > Cc: Simon Horman <horms+renesas@verge.net.au> > Cc: Wolfram Sang <wsa@the-dreams.de> > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > Cc: linux-renesas-soc@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > --- > V2: - Deduplicated regular and UHS pins > - Added sdhi3_ds pin pinmux > V3: - Squash two patches, one adding SDHI nodes to R8A77990 E3 DTSI > and another enabling them on E3 Ebisu, together. Hi, I am wondering if something special is required in order to use eMMC connected to SDHI3. Using renesas-drivers-2019-01-08-v5.0-rc1 I do not see that device initialised to the point where a corresponding block device is present. [ 0.000127] NOTICE: BL2: R-Car Gen3 Initial Program Loader(CA53) Rev.1.0.21 [ 0.005703] NOTICE: BL2: PRR is R-Car E3 Ver.1.0 [ 0.010361] NOTICE: BL2: PLL1 nonSSCG Clock select [ 0.015356] NOTICE: BL2: Board is Ebisu-4D Rev.1.0 [ 0.020041] NOTICE: BL2: Boot device is HyperFlash(80MHz) [ 0.025479] NOTICE: BL2: LCM state is CM [ 0.029445] NOTICE: BL2: 0x400000000 - 0x480000000, 2 GiB [ 0.034877] NOTICE: BL2: DDR1856(rev.0.07)NOTICE: ..0 [ 0.040425] NOTICE: BL2: DRAM Split is OFF [ 0.044304] NOTICE: BL2: QoS is default setting(rev.0.02) [ 0.049748] NOTICE: BL2: DRAM refresh interval 3.9 usec [ 0.055089] NOTICE: BL2: v1.4(release):15dba6b-dirty [ 0.060029] NOTICE: BL2: Built : 04:48:01, Jun 26 2018 [ 0.065217] NOTICE: BL2: Normal boot [ 0.068872] NOTICE: BL2: dst=0xe6311d00 src=0x8180000 len=512(0x200) [ 0.075247] NOTICE: BL2: dst=0x43f00000 src=0x8180400 len=6144(0x1800) [ 0.081874] NOTICE: BL2: dst=0x44000000 src=0x81c0000 len=65536(0x10000) [ 0.089118] NOTICE: BL2: dst=0x44100000 src=0x8200000 len=1048576(0x100000) [ 0.103992] NOTICE: BL2: dst=0x50000000 src=0x8640000 len=1048576(0x100000) # dmesg | egrep "(sd|mmc)" [ 2.872441] renesas_sdhi_internal_dmac ee100000.sd: Got CD GPIO [ 2.878587] renesas_sdhi_internal_dmac ee100000.sd: Got WP GPIO [ 2.885806] renesas_sdhi_internal_dmac ee120000.sd: Got CD GPIO [ 2.893284] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 2.901602] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 2.909708] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 2.917236] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 2.925214] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2 [ 3.295711] renesas_sdhi_internal_dmac ee100000.sd: Got CD GPIO [ 3.301808] renesas_sdhi_internal_dmac ee100000.sd: Got WP GPIO [ 3.308042] renesas_sdhi_internal_dmac ee100000.sd: Linked as a consumer to regulator.4 [ 3.316268] renesas_sdhi_internal_dmac ee100000.sd: Linked as a consumer to regulator.6 [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz [ 3.384547] renesas_sdhi_internal_dmac ee120000.sd: Got CD GPIO [ 3.390915] renesas_sdhi_internal_dmac ee120000.sd: Linked as a consumer to regulator.5 [ 3.399171] renesas_sdhi_internal_dmac ee120000.sd: Linked as a consumer to regulator.7 [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz [ 3.468133] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 3.476448] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 3.484635] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 3.492147] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 3.500110] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2 [ 3.562322] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 3.570834] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 3.579021] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 3.586657] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 3.594653] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2 [ 3.640782] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 3.649110] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 3.657213] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 3.664677] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 3.672599] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2 [ 3.688811] mmc0: new ultra high speed SDR104 SDXC card at address 0007 [ 3.698572] mmcblk0: mmc0:0007 SL64G 58.3 GiB [ 3.726399] mmcblk0: p1 [ 3.763694] mmc1: new ultra high speed SDR104 SDHC card at address 0001 [ 3.772525] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 3.781623] mmcblk1: mmc1:0001 00000 29.8 GiB [ 3.786779] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 3.795548] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 3.803099] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 3.811006] mmcblk1: p1 [ 3.815437] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2 [ 3.856991] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.2 [ 3.865263] renesas_sdhi_internal_dmac ee160000.sd: Linked as a consumer to regulator.1 [ 3.873371] renesas_sdhi_internal_dmac ee160000.sd: Failed getting OCR mask: 0 [ 3.880864] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.1 [ 3.888786] renesas_sdhi_internal_dmac ee160000.sd: Dropping the link to regulator.2
> [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz > [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz No mmc2 initialized. That should work regardless of eMMC. Probably something wrong in the DT somewhere.
On 1/9/19 11:57 AM, Wolfram Sang wrote: >> [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz >> [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz > > No mmc2 initialized. That should work regardless of eMMC. Probably > something wrong in the DT somewhere. Weird, it worked in next-20181102 with these patches, I just rechecked: 7818a9f06df1 mmc: renesas_sdhi: Whitelist R8A77990 SDHI a05a906776f8 pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI 2cc9d3a293e9 pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions 6b8d151613b7 pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions 9167b22938f7 pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions 000cc50fc942 arm64: dts: r8a77990-ebisu: Enable HS200 of SDHI3 d3f59bbbf7ce arm64: dts: r8a77990-ebisu: Enable eMMC of SDHI3 5928c59bff8d arm64: dts: r8a77990-ebisu: Enable UHS-I of SDHI0 and SDHI1 dae32a3172b8 arm64: dts: r8a77990-ebisu: Enable SD card of SDHI0 and SDHI1 8feef039c6c6 arm64: dts: r8a77990: Add SDHI device nodes 25e9471b6a27 (tag: next-20181102) Add linux-next specific files for 20181102 I'll let you know once I figure it out.
On Wed, Jan 09, 2019 at 01:02:00PM +0100, Marek Vasut wrote: > On 1/9/19 11:57 AM, Wolfram Sang wrote: > >> [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz > >> [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz > > > > No mmc2 initialized. That should work regardless of eMMC. Probably > > something wrong in the DT somewhere. > > Weird, it worked in next-20181102 with these patches, I just rechecked: > > 7818a9f06df1 mmc: renesas_sdhi: Whitelist R8A77990 SDHI > a05a906776f8 pinctrl: sh-pfc: r8a77990: Add voltage switch operations > for SDHI > 2cc9d3a293e9 pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions > 6b8d151613b7 pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and > functions > 9167b22938f7 pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and > functions > 000cc50fc942 arm64: dts: r8a77990-ebisu: Enable HS200 of SDHI3 > d3f59bbbf7ce arm64: dts: r8a77990-ebisu: Enable eMMC of SDHI3 > 5928c59bff8d arm64: dts: r8a77990-ebisu: Enable UHS-I of SDHI0 and SDHI1 > dae32a3172b8 arm64: dts: r8a77990-ebisu: Enable SD card of SDHI0 and SDHI1 > 8feef039c6c6 arm64: dts: r8a77990: Add SDHI device nodes > 25e9471b6a27 (tag: next-20181102) Add linux-next specific files for 20181102 > > I'll let you know once I figure it out. Could it be related to potentially old U-Boot etc.. on the board I am using?
On 1/9/19 1:32 PM, Simon Horman wrote: > On Wed, Jan 09, 2019 at 01:02:00PM +0100, Marek Vasut wrote: >> On 1/9/19 11:57 AM, Wolfram Sang wrote: >>>> [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz >>>> [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz >>> >>> No mmc2 initialized. That should work regardless of eMMC. Probably >>> something wrong in the DT somewhere. >> >> Weird, it worked in next-20181102 with these patches, I just rechecked: >> >> 7818a9f06df1 mmc: renesas_sdhi: Whitelist R8A77990 SDHI >> a05a906776f8 pinctrl: sh-pfc: r8a77990: Add voltage switch operations >> for SDHI >> 2cc9d3a293e9 pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions >> 6b8d151613b7 pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and >> functions >> 9167b22938f7 pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and >> functions >> 000cc50fc942 arm64: dts: r8a77990-ebisu: Enable HS200 of SDHI3 >> d3f59bbbf7ce arm64: dts: r8a77990-ebisu: Enable eMMC of SDHI3 >> 5928c59bff8d arm64: dts: r8a77990-ebisu: Enable UHS-I of SDHI0 and SDHI1 >> dae32a3172b8 arm64: dts: r8a77990-ebisu: Enable SD card of SDHI0 and SDHI1 >> 8feef039c6c6 arm64: dts: r8a77990: Add SDHI device nodes >> 25e9471b6a27 (tag: next-20181102) Add linux-next specific files for 20181102 >> >> I'll let you know once I figure it out. > > Could it be related to potentially old U-Boot etc.. on the board I am using? No, I don't think so (however, you should only use latest greatest of course :-) ). I see this on next/master, but not on next/20181224 right now, so I'm bisecting it down.
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts index 0b5aead76077..306b35f0f541 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts @@ -129,6 +129,15 @@ }; }; + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator1 { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; @@ -180,6 +189,54 @@ #clock-cells = <0>; clock-frequency = <74250000>; }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi1: regulator-vcc-sdhi1 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI1 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi1: regulator-vccq-sdhi1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI1 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &audio_clk_a { @@ -415,6 +472,36 @@ function = "scif2"; }; + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi1_pins: sd1 { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds"; + function = "sdhi3"; + power-source = <1800>; + }; + sound_pins: sound { groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; function = "ssi"; @@ -531,3 +618,46 @@ status = "okay"; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi1>; + vqmmc-supply = <&vccq_sdhi1>; + cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdhi3 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + mmc-hs200-1_8v; + bus-width = <8>; + non-removable; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index beb53aaa9e2c..e0092fb27ec0 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1351,6 +1351,42 @@ status = "disabled"; }; + sdhi0: sd@ee100000 { + compatible = "renesas,sdhi-r8a77990", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee100000 0 0x2000>; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 314>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 314>; + status = "disabled"; + }; + + sdhi1: sd@ee120000 { + compatible = "renesas,sdhi-r8a77990", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee120000 0 0x2000>; + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 313>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 313>; + status = "disabled"; + }; + + sdhi3: sd@ee160000 { + compatible = "renesas,sdhi-r8a77990", + "renesas,rcar-gen3-sdhi"; + reg = <0 0xee160000 0 0x2000>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 311>; + max-frequency = <200000000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 311>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;