| Message ID | 20181106131807.29951-16-Zhiqiang.Hou@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: refactor the Mobiveil driver and add PCIe support for NXP LX SoCs | expand |
On Tue, Nov 06, 2018 at 01:20:41PM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > is not used in current code, and "apb_csr" is not used by some > platorms. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > --- > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > 1 file changed, 2 insertions(+) Acked-by: Rob Herring <robh@kernel.org>
Hi Rob, Thanks a lot for your ACK! > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 2018年11月13日 2:13 > To: Z.q. Hou <zhiqiang.hou@nxp.com> > Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > bhelgaas@google.com; mark.rutland@arm.com; > l.subrahmanya@mobiveil.co.in; shawnguo@kernel.org; Leo Li > <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com; Mingkai Hu > <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>; Xiaowei Bao > <xiaowei.bao@nxp.com> > Subject: Re: [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and > apb_csr to optional > > On Tue, Nov 06, 2018 at 01:20:41PM +0000, Z.q. Hou wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > > is not used in current code, and "apb_csr" is not used by some > > platorms. > > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > --- > > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > > 1 file changed, 2 insertions(+) > > Acked-by: Rob Herring <robh@kernel.org> Regards, Zhiqiang
Acked-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> On Tue, Nov 6, 2018 at 6:50 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > is not used in current code, and "apb_csr" is not used by some > platorms. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > --- > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > index a618d4787dd7..64156993e052 100644 > --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > @@ -10,8 +10,10 @@ Required properties: > interrupt source. The value must be 1. > - compatible: Should contain "mbvl,gpex40-pcie" > - reg: Should contain PCIe registers location and length > + Mandatory: > "config_axi_slave": PCIe controller registers > "csr_axi_slave" : Bridge config registers > + Optional: > "gpio_slave" : GPIO registers to control slot power > "apb_csr" : MSI registers > > -- > 2.17.1 >
Hi Subrahmanya, Thanks a lot for your ACK! Regards, Zhiqiang > -----Original Message----- > From: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> > Sent: 2018年11月14日 17:33 > To: Z.q. Hou <zhiqiang.hou@nxp.com> > Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Bjorn Helgaas > <bhelgaas@google.com>; robh+dt@kernel.org; mark.rutland@arm.com; > shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; Lorenzo Pieralisi > <lorenzo.pieralisi@arm.com>; Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian > <minghuan.lian@nxp.com>; Xiaowei Bao <xiaowei.bao@nxp.com> > Subject: Re: [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and > apb_csr to optional > > Acked-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> > > On Tue, Nov 6, 2018 at 6:50 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote: > > > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > > is not used in current code, and "apb_csr" is not used by some > > platorms. > > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > --- > > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > > b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > > index a618d4787dd7..64156993e052 100644 > > --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > > @@ -10,8 +10,10 @@ Required properties: > > interrupt source. The value must be 1. > > - compatible: Should contain "mbvl,gpex40-pcie" > > - reg: Should contain PCIe registers location and length > > + Mandatory: > > "config_axi_slave": PCIe controller registers > > "csr_axi_slave" : Bridge config registers > > + Optional: > > "gpio_slave" : GPIO registers to control slot power > > "apb_csr" : MSI registers > > > > -- > > 2.17.1 > >
diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt index a618d4787dd7..64156993e052 100644 --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt @@ -10,8 +10,10 @@ Required properties: interrupt source. The value must be 1. - compatible: Should contain "mbvl,gpex40-pcie" - reg: Should contain PCIe registers location and length + Mandatory: "config_axi_slave": PCIe controller registers "csr_axi_slave" : Bridge config registers + Optional: "gpio_slave" : GPIO registers to control slot power "apb_csr" : MSI registers