Message ID | 0b60c924d30ce3e04325214789de2c5b0403a056.1543781680.git.mesihkilinc@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | initial support for "suniv" Allwinner new ARM9 SoC | expand |
On Sun, Dec 02, 2018 at 11:23:48PM +0300, Mesih Kilinc wrote: > The suniv ARMv5 F1C100s chip has similar sram controller to sun4i A10. > Add compatible string for it. > > Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> > Reviewed-by: Rob Herring <robh@kernel.org> Applied, thanks! Maxime
diff --git a/Documentation/devicetree/bindings/sram/sunxi-sram.txt b/Documentation/devicetree/bindings/sram/sunxi-sram.txt index 62dd074..5c84850 100644 --- a/Documentation/devicetree/bindings/sram/sunxi-sram.txt +++ b/Documentation/devicetree/bindings/sram/sunxi-sram.txt @@ -19,6 +19,7 @@ Required properties: - "allwinner,sun50i-a64-sram-controller" (deprecated) - "allwinner,sun50i-a64-system-control" - "allwinner,sun50i-h6-system-control", "allwinner,sun50i-a64-system-control" + - "allwinner,suniv-f1c100s-system-control", "allwinner,sun4i-a10-system-control" - reg : sram controller register offset + length SRAM nodes @@ -58,6 +59,9 @@ The valid sections compatible for A64 are: The valid sections compatible for H6 are: - allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c +The valid sections compatible for F1C100s are: + - allwinner,suniv-f1c100s-sram-d, allwinner,sun4i-a10-sram-d + Devices using SRAM sections ---------------------------