diff mbox series

[2/3] arm64: tegra: Add thermal zones on Tegra194

Message ID 20181123121839.18573-2-thierry.reding@gmail.com (mailing list archive)
State Not Applicable, archived
Delegated to: Eduardo Valentin
Headers show
Series [1/3] dt-bindings: thermal: tegra-bpmp: Add Tegra194 support | expand

Commit Message

Thierry Reding Nov. 23, 2018, 12:18 p.m. UTC
From: Thierry Reding <treding@nvidia.com>

The NVIDIA Tegra194 SoC defines six thermal zones. Define all of them in
device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 39 ++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

Comments

Eduardo Valentin Dec. 15, 2018, 5:28 p.m. UTC | #1
On Fri, Nov 23, 2018 at 01:18:38PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The NVIDIA Tegra194 SoC defines six thermal zones. Define all of them in
> device tree.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>

Acked-by: Eduardo Valentin <edubezval@gmail.com>

The patch 1 I added in my -linus branch.

> ---
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 39 ++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index cbba7395a286..39169f6b6166 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -5,6 +5,7 @@
>  #include <dt-bindings/mailbox/tegra186-hsp.h>
>  #include <dt-bindings/reset/tegra194-reset.h>
>  #include <dt-bindings/power/tegra194-powergate.h>
> +#include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
>  
>  / {
>  	compatible = "nvidia,tegra194";
> @@ -938,6 +939,44 @@
>  		mbox-names = "rx", "tx";
>  	};
>  
> +	thermal-zones {
> +		cpu {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_CPU>;
> +			status = "disabled";
> +		};
> +
> +		gpu {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_GPU>;
> +			status = "disabled";
> +		};
> +
> +		aux {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_AUX>;
> +			status = "disabled";
> +		};
> +
> +		pllx {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_PLLX>;
> +			status = "disabled";
> +		};
> +
> +		ao {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_AO>;
> +			status = "disabled";
> +		};
> +
> +		tj {
> +			thermal-sensors = <&{/bpmp/thermal}
> +					   TEGRA194_BPMP_THERMAL_ZONE_TJ_MAX>;
> +			status = "disabled";
> +		};
> +	};
> +
>  	timer {
>  		compatible = "arm,armv8-timer";
>  		interrupts = <GIC_PPI 13
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index cbba7395a286..39169f6b6166 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -5,6 +5,7 @@ 
 #include <dt-bindings/mailbox/tegra186-hsp.h>
 #include <dt-bindings/reset/tegra194-reset.h>
 #include <dt-bindings/power/tegra194-powergate.h>
+#include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
 
 / {
 	compatible = "nvidia,tegra194";
@@ -938,6 +939,44 @@ 
 		mbox-names = "rx", "tx";
 	};
 
+	thermal-zones {
+		cpu {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_CPU>;
+			status = "disabled";
+		};
+
+		gpu {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_GPU>;
+			status = "disabled";
+		};
+
+		aux {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_AUX>;
+			status = "disabled";
+		};
+
+		pllx {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_PLLX>;
+			status = "disabled";
+		};
+
+		ao {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_AO>;
+			status = "disabled";
+		};
+
+		tj {
+			thermal-sensors = <&{/bpmp/thermal}
+					   TEGRA194_BPMP_THERMAL_ZONE_TJ_MAX>;
+			status = "disabled";
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13