| Message ID | 20181206111823.45985-3-peng.ma@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v12,1/3] arm: dts: ls1021a: add qdma device tree nodes | expand |
Hi shawnguo, I send this series patch to http://patchwork.ozlabs.org/project/devicetree-bindings/list/ But I did not find patchs on devicetree patchwork, could I send patchs again. Thanks. Best Regards, Peng >-----Original Message----- >From: Peng Ma <peng.ma@nxp.com> >Sent: 2018年12月6日 19:18 >To: vkoul@kernel.org; shawnguo@kernel.org >Cc: Leo Li <leoyang.li@nxp.com>; robh+dt@kernel.org; >mark.rutland@arm.com; linux-arm-kernel@lists.infradead.org; >devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Peng Ma ><peng.ma@nxp.com>; Wen He <wen.he_1@nxp.com> >Subject: [PATCH 3/3] arm64: dts: ls1046a: add qdma device tree nodes > >add the qDMA device tree nodes for LS1046A devices. > >Signed-off-by: Wen He <wen.he_1@nxp.com> >Signed-off-by: Peng Ma <peng.ma@nxp.com> >--- >change in v12: > - used GIC_SPI and IRQ_TYPE_LEVEL_HIGH to instead immediate > number > > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 21 >+++++++++++++++++++++ > 1 files changed, 21 insertions(+), 0 deletions(-) > >diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >index 51cbd50..8fcce79 100644 >--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi >@@ -704,6 +704,27 @@ > <0000 0 0 4 &gic GIC_SPI 154 >IRQ_TYPE_LEVEL_HIGH>; > }; > >+ qdma: dma-controller@8380000 { >+ compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma"; >+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ >+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */ >+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */ >+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, >+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, >+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, >+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, >+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; >+ interrupt-names = "qdma-error", "qdma-queue0", >+ "qdma-queue1", "qdma-queue2", "qdma-queue3"; >+ dma-channels = <8>; >+ block-number = <1>; >+ block-offset = <0x10000>; >+ fsl,dma-queues = <2>; >+ status-sizes = <64>; >+ queue-sizes = <64 64>; >+ big-endian; >+ }; >+ > }; > > reserved-memory { >-- >1.7.1
On Fri, Dec 14, 2018 at 10:30:15AM +0000, Peng Ma wrote: > Hi shawnguo, > > I send this series patch to http://patchwork.ozlabs.org/project/devicetree-bindings/list/ > But I did not find patchs on devicetree patchwork, could I send patchs again. You do not need to. I have sent the series for 4.21 inclusion. I forgot to reply and let you know. Sorry. Shawn
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 51cbd50..8fcce79 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -704,6 +704,27 @@ <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; }; + qdma: dma-controller@8380000 { + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma"; + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ + <0x0 0x8390000 0x0 0x10000>, /* Status regs */ + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */ + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "qdma-error", "qdma-queue0", + "qdma-queue1", "qdma-queue2", "qdma-queue3"; + dma-channels = <8>; + block-number = <1>; + block-offset = <0x10000>; + fsl,dma-queues = <2>; + status-sizes = <64>; + queue-sizes = <64 64>; + big-endian; + }; + }; reserved-memory {