| Message ID | 20181214221640.25354-2-jcrouse@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | arm64: dts: sdm845: Add sdm845 GPU interconnect | expand |
Hi, On Fri, Dec 14, 2018 at 2:16 PM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > Add documentation for the interconnect and interconnect-names bindings > for the GPU node as detailed by bindings/interconnect/interconnect.txt. > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > --- > Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ > 1 file changed, 6 insertions(+) Looks good to me. This could go into Andy's tree as soon as Georgi's series lands somewhere. Reviewed-by: Douglas Anderson <dianders@chromium.org>
Hi, On Fri, Dec 14, 2018 at 3:58 PM Doug Anderson <dianders@chromium.org> wrote: > > Hi, > > On Fri, Dec 14, 2018 at 2:16 PM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > > > Add documentation for the interconnect and interconnect-names bindings > > for the GPU node as detailed by bindings/interconnect/interconnect.txt. > > > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > > --- > > Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ > > 1 file changed, 6 insertions(+) > > Looks good to me. This could go into Andy's tree as soon as Georgi's > series lands somewhere. > > Reviewed-by: Douglas Anderson <dianders@chromium.org> To correct myself, this maybe should go through Georgi's tree together with <https://patchwork.kernel.org/patch/10718587/>. It's the actual dts that would go into Andy's tree. -Doug
On Fri, Dec 14, 2018 at 03:16:39PM -0700, Jordan Crouse wrote: > Add documentation for the interconnect and interconnect-names bindings > for the GPU node as detailed by bindings/interconnect/interconnect.txt. > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > --- > Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt > index 8d9415180c22..19b5ae459fdb 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.txt > +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt > @@ -19,6 +19,9 @@ Required properties: > * "mem_iface" > - iommus: optional phandle to an adreno iommu instance > - operating-points-v2: optional phandle to the OPP operating points > +- interconnect: optional phandle to a interconnect provider. See > + ../interconnect/interconnect.txt for details. > +- interconnect-names: Name string for the interconnects. > - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will > control the power for the GPU > > @@ -68,6 +71,9 @@ Example a6xx (with GMU): > > operating-points-v2 = <&gpu_opp_table>; > > + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; > + interconnect-names = "gfx-mem"; There's not really any point to having *-names when there is only 1 value. > + > qcom,gmu = <&gmu>; > }; > }; > -- > 2.18.0 >
On Tue, Dec 18, 2018 at 11:22:01AM -0600, Rob Herring wrote: > On Fri, Dec 14, 2018 at 03:16:39PM -0700, Jordan Crouse wrote: > > Add documentation for the interconnect and interconnect-names bindings > > for the GPU node as detailed by bindings/interconnect/interconnect.txt. > > > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > > --- > > Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt > > index 8d9415180c22..19b5ae459fdb 100644 > > --- a/Documentation/devicetree/bindings/display/msm/gpu.txt > > +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt > > @@ -19,6 +19,9 @@ Required properties: > > * "mem_iface" > > - iommus: optional phandle to an adreno iommu instance > > - operating-points-v2: optional phandle to the OPP operating points > > +- interconnect: optional phandle to a interconnect provider. See > > + ../interconnect/interconnect.txt for details. > > +- interconnect-names: Name string for the interconnects. > > - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will > > control the power for the GPU > > > > @@ -68,6 +71,9 @@ Example a6xx (with GMU): > > > > operating-points-v2 = <&gpu_opp_table>; > > > > + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; > > + interconnect-names = "gfx-mem"; > > There's not really any point to having *-names when there is only 1 > value. For the moment we can only look up the path from the DT by name. I guess we could add an lookup by index but I'm not sure if that had already been considered and rejected. Jordan
On Tue, Dec 18, 2018 at 12:07 PM Jordan Crouse <jcrouse@codeaurora.org> wrote: > > On Tue, Dec 18, 2018 at 11:22:01AM -0600, Rob Herring wrote: > > On Fri, Dec 14, 2018 at 03:16:39PM -0700, Jordan Crouse wrote: > > > Add documentation for the interconnect and interconnect-names bindings > > > for the GPU node as detailed by bindings/interconnect/interconnect.txt. > > > > > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> > > > --- > > > Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt > > > index 8d9415180c22..19b5ae459fdb 100644 > > > --- a/Documentation/devicetree/bindings/display/msm/gpu.txt > > > +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt > > > @@ -19,6 +19,9 @@ Required properties: > > > * "mem_iface" > > > - iommus: optional phandle to an adreno iommu instance > > > - operating-points-v2: optional phandle to the OPP operating points > > > +- interconnect: optional phandle to a interconnect provider. See > > > + ../interconnect/interconnect.txt for details. > > > +- interconnect-names: Name string for the interconnects. > > > - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will > > > control the power for the GPU > > > > > > @@ -68,6 +71,9 @@ Example a6xx (with GMU): > > > > > > operating-points-v2 = <&gpu_opp_table>; > > > > > > + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; > > > + interconnect-names = "gfx-mem"; > > > > There's not really any point to having *-names when there is only 1 > > value. > > For the moment we can only look up the path from the DT by name. I guess we > could add an lookup by index but I'm not sure if that had already been > considered and rejected. You don't have to support lookup by index, just support a NULL name. Rob
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 8d9415180c22..19b5ae459fdb 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -19,6 +19,9 @@ Required properties: * "mem_iface" - iommus: optional phandle to an adreno iommu instance - operating-points-v2: optional phandle to the OPP operating points +- interconnect: optional phandle to a interconnect provider. See + ../interconnect/interconnect.txt for details. +- interconnect-names: Name string for the interconnects. - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will control the power for the GPU @@ -68,6 +71,9 @@ Example a6xx (with GMU): operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + interconnect-names = "gfx-mem"; + qcom,gmu = <&gmu>; }; };
Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> --- Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++ 1 file changed, 6 insertions(+)