| Message ID | 20181112080557.22698-4-bjorn.andersson@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Qualcomm AOSS QMP side channel binding and driver | expand |
Hi Bjorn, On 11/12/2018 1:35 PM, Bjorn Andersson wrote: > The AOSS QMP genpd provider implements control over power-related > resources related to low-power state associated with the remoteprocs in > the system as well as control over a set of clocks related to debug > hardware in the SoC. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/soc/qcom/Kconfig | 8 ++ > drivers/soc/qcom/Makefile | 1 + > drivers/soc/qcom/aoss-qmp-pd.c | 135 +++++++++++++++++++++++++++++++++ > 3 files changed, 144 insertions(+) > create mode 100644 drivers/soc/qcom/aoss-qmp-pd.c > > diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig > index ba08fc00d7f5..e1eda3d59748 100644 > --- a/drivers/soc/qcom/Kconfig > +++ b/drivers/soc/qcom/Kconfig > @@ -10,6 +10,14 @@ config QCOM_AOSS_QMP > micro-controller in the AOSS, using QMP, to control certain resource > that are not exposed through RPMh. > > +config QCOM_AOSS_QMP_PD > + tristate "Qualcomm AOSS Messaging Power Domain driver" > + depends on QCOM_AOSS_QMP > + help > + This driver provides the means of controlling the AOSSs handling of > + low-power state for resources related to the remoteproc subsystems as > + well as controlling the debug clocks. > + > config QCOM_COMMAND_DB > bool "Qualcomm Command DB" > depends on ARCH_QCOM || COMPILE_TEST > diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile > index d0d7fdc94d9a..ebfa414a5b77 100644 > --- a/drivers/soc/qcom/Makefile > +++ b/drivers/soc/qcom/Makefile > @@ -1,6 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0 > CFLAGS_rpmh-rsc.o := -I$(src) > obj-$(CONFIG_QCOM_AOSS_QMP) += aoss-qmp.o > +obj-$(CONFIG_QCOM_AOSS_QMP_PD) += aoss-qmp-pd.o > obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o > obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o > obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o > diff --git a/drivers/soc/qcom/aoss-qmp-pd.c b/drivers/soc/qcom/aoss-qmp-pd.c > new file mode 100644 > index 000000000000..467d0db4abfa > --- /dev/null > +++ b/drivers/soc/qcom/aoss-qmp-pd.c > @@ -0,0 +1,135 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2018, Linaro Ltd > + */ > +#include <linux/interrupt.h> > +#include <linux/module.h> > +#include <linux/of_platform.h> > +#include <linux/platform_device.h> > +#include <linux/pm_domain.h> > +#include <linux/soc/qcom/aoss-qmp.h> > + > +#include <dt-bindings/power/qcom-aoss-qmp.h> > + > +struct qmp_pd { > + struct qmp *qmp; > + > + struct generic_pm_domain pd; > + > + const char *name; > +}; > + > +#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) > + > +struct qmp_pd_resource { > + const char *name; > + int (*on)(struct generic_pm_domain *domain); > + int (*off)(struct generic_pm_domain *domain); > +}; > + > +static int qmp_pd_clock_toggle(struct qmp_pd *res, bool enable) > +{ > + char buf[96]; > + size_t n; > + > + n = snprintf(buf, sizeof(buf), "{class: clock, res: %s, val: %d}", > + res->name, !!enable); > + return qmp_send(res->qmp, buf, n); > +} > + I was trying to get QDSS working with these patches and found one issue in qmp_send of qmp_pd_clock_toggle. The third return value should be sizeof(buf) instead of n because n just returns len as 33 and the below check in qmp send will always fail and trigger WARN_ON's. if (WARN_ON(len % sizeof(u32))) { dev_err(qmp->dev, "message not 32-bit aligned\n"); return -EINVAL; } Also I observed that multiple "ucore will not ack channel" messages with len being returned n instead of buf size. One more thing is do we really require *WARN_ON and dev_err* both because it just spams the kernel logs, I think dev_err message is clear enough to be able to understand the error condition. Thanks, Sai
Hi Bjorn, On 11/12/2018 1:35 PM, Bjorn Andersson wrote: > The AOSS QMP genpd provider implements control over power-related > resources related to low-power state associated with the remoteprocs in > the system as well as control over a set of clocks related to debug > hardware in the SoC. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> One more issue is that amba bus probe fails and coresight(qdss) does not work with these because of clocks being modeled as power-domain. Below is the log snippet: [ 4.580715] coresight-etm4x: probe of 7040000.etm failed with error -2 [ 4.588087] coresight-etm4x: probe of 7140000.etm failed with error -2 [ 4.595407] coresight-etm4x: probe of 7240000.etm failed with error -2 [ 4.602796] coresight-etm4x: probe of 7340000.etm failed with error -2 [ 4.610108] coresight-etm4x: probe of 7440000.etm failed with error -2 [ 4.617453] coresight-etm4x: probe of 7540000.etm failed with error -2 [ 4.624831] coresight-etm4x: probe of 7640000.etm failed with error -2 [ 4.632190] coresight-etm4x: probe of 7740000.etm failed with error -2 This is because Amba bus probe has amba_get_enable_pclk() which gets apb_pclk and returns error if it can't get that clk. Just for testing, I ignored amba_get_enable_pclk() in probe and coresight seems to work fine. Thanks, Sai
On Mon 26 Nov 19:31 PST 2018, Sai Prakash Ranjan wrote: > Hi Bjorn, > Thanks for your review Sai! > On 11/12/2018 1:35 PM, Bjorn Andersson wrote: [..] > > +static int qmp_pd_clock_toggle(struct qmp_pd *res, bool enable) > > +{ > > + char buf[96]; > > + size_t n; > > + > > + n = snprintf(buf, sizeof(buf), "{class: clock, res: %s, val: %d}", > > + res->name, !!enable); > > + return qmp_send(res->qmp, buf, n); > > +} > > + > > I was trying to get QDSS working with these patches and found one issue > in qmp_send of qmp_pd_clock_toggle. > > The third return value should be sizeof(buf) instead of n because n just > returns len as 33 and the below check in qmp send will always fail and > trigger WARN_ON's. > > if (WARN_ON(len % sizeof(u32))) { > dev_err(qmp->dev, "message not 32-bit aligned\n"); > return -EINVAL; > } > > Also I observed that multiple "ucore will not ack channel" messages with > len being returned n instead of buf size. > I must have been "lucky" when I did my final pass of cleanups and retests, thanks for spotting this! > One more thing is do we really require *WARN_ON and dev_err* both because it > just spams the kernel logs, I think dev_err message is clear > enough to be able to understand the error condition. > No, that's just unnecessary. Regards, Bjorn
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index ba08fc00d7f5..e1eda3d59748 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -10,6 +10,14 @@ config QCOM_AOSS_QMP micro-controller in the AOSS, using QMP, to control certain resource that are not exposed through RPMh. +config QCOM_AOSS_QMP_PD + tristate "Qualcomm AOSS Messaging Power Domain driver" + depends on QCOM_AOSS_QMP + help + This driver provides the means of controlling the AOSSs handling of + low-power state for resources related to the remoteproc subsystems as + well as controlling the debug clocks. + config QCOM_COMMAND_DB bool "Qualcomm Command DB" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index d0d7fdc94d9a..ebfa414a5b77 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 CFLAGS_rpmh-rsc.o := -I$(src) obj-$(CONFIG_QCOM_AOSS_QMP) += aoss-qmp.o +obj-$(CONFIG_QCOM_AOSS_QMP_PD) += aoss-qmp-pd.o obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o diff --git a/drivers/soc/qcom/aoss-qmp-pd.c b/drivers/soc/qcom/aoss-qmp-pd.c new file mode 100644 index 000000000000..467d0db4abfa --- /dev/null +++ b/drivers/soc/qcom/aoss-qmp-pd.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, Linaro Ltd + */ +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/pm_domain.h> +#include <linux/soc/qcom/aoss-qmp.h> + +#include <dt-bindings/power/qcom-aoss-qmp.h> + +struct qmp_pd { + struct qmp *qmp; + + struct generic_pm_domain pd; + + const char *name; +}; + +#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) + +struct qmp_pd_resource { + const char *name; + int (*on)(struct generic_pm_domain *domain); + int (*off)(struct generic_pm_domain *domain); +}; + +static int qmp_pd_clock_toggle(struct qmp_pd *res, bool enable) +{ + char buf[96]; + size_t n; + + n = snprintf(buf, sizeof(buf), "{class: clock, res: %s, val: %d}", + res->name, !!enable); + return qmp_send(res->qmp, buf, n); +} + +static int qmp_pd_clock_on(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_clock_off(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), false); +} + +static int qmp_pd_image_toggle(struct qmp_pd *res, bool enable) +{ + char buf[96]; + size_t n; + + n = snprintf(buf, sizeof(buf), + "{class: image, res: load_state, name: %s, val: %s}", + res->name, enable ? "on" : "off"); + return qmp_send(res->qmp, buf, sizeof(buf)); +} + +static int qmp_pd_image_on(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_image_off(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), false); +} + +static const struct qmp_pd_resource sdm845_resources[] = { + [AOSS_QMP_QDSS_CLK] = { "qdss", qmp_pd_clock_on, qmp_pd_clock_off }, + [AOSS_QMP_LS_CDSP] = { "cdsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_LPASS] = { "adsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_MODEM] = { "modem", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SLPI] = { "slpi", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SPSS] = { "spss", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_VENUS] = { "venus", qmp_pd_image_on, qmp_pd_image_off }, +}; + +static int qmp_pd_probe(struct platform_device *pdev) +{ + struct genpd_onecell_data *data; + struct qmp_pd *res; + struct qmp *qmp; + size_t num = ARRAY_SIZE(sdm845_resources); + int i; + + qmp = dev_get_drvdata(pdev->dev.parent); + if (!qmp) + return -EINVAL; + + res = devm_kcalloc(&pdev->dev, num, sizeof(*res), GFP_KERNEL); + if (!res) + return -ENOMEM; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains), + GFP_KERNEL); + + for (i = 0; i < num; i++) { + pm_genpd_init(&res[i].pd, NULL, true); + res[i].qmp = qmp; + res[i].name = sdm845_resources[i].name; + + res[i].pd.name = sdm845_resources[i].name; + res[i].pd.power_on = sdm845_resources[i].on; + res[i].pd.power_off = sdm845_resources[i].off; + + data->domains[data->num_domains++] = &res[i].pd; + } + + return of_genpd_add_provider_onecell(pdev->dev.of_node, data); +} + +static const struct of_device_id qmp_pd_dt_match[] = { + { .compatible = "qcom,sdm845-aoss-qmp-pd", }, + {} +}; +MODULE_DEVICE_TABLE(of, qmp_pd_dt_match); + +static struct platform_driver qmp_pd_driver = { + .driver = { + .name = "aoss_qmp_pd", + .of_match_table = qmp_pd_dt_match, + }, + .probe = qmp_pd_probe, +}; +module_platform_driver(qmp_pd_driver); + +MODULE_DESCRIPTION("Qualcomm AOSS QMP load-state driver"); +MODULE_LICENSE("GPL v2");
The AOSS QMP genpd provider implements control over power-related resources related to low-power state associated with the remoteprocs in the system as well as control over a set of clocks related to debug hardware in the SoC. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- drivers/soc/qcom/Kconfig | 8 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/aoss-qmp-pd.c | 135 +++++++++++++++++++++++++++++++++ 3 files changed, 144 insertions(+) create mode 100644 drivers/soc/qcom/aoss-qmp-pd.c