Message ID | 20181229000829.16571-1-martin.blumenstingl@googlemail.com (mailing list archive) |
---|---|
Headers | show |
Series | Meson8b RGMII Ethernet pin cleanup | expand |
Hi Martin, PERIPHS_PIN_MUX_7: - register 7 bit 22: ETH_RXD3 (DIF_TTL_2_P) - register 7 bit 23: ETH_RXD2 (DIF_TTL_2_N) On 2018/12/29 8:08, Martin Blumenstingl wrote: > Hi Emiliano, Hi Linus, Hi Jianxin, > > could you please test the patch from this series on your Odroid-C1? > I tested it on mine and Ethernet seems to be improve Ethernet transmit > speeds greatly (at the cost of a small drop in receive performance). > > Jianxin, can you please give us the description for pin mux register 7 > (PERIPHS_PIN_MUX_7) bits 22 and 23 on Meson8b (S805). The public > datasheet doesn't mention them so we're missing the name of the function > and the pin(s) which are controlled by each bit. > > > Changes since v1 at [0]: > - rebased so it applies on top of "ARM: dts: meson: meson8b: add the CPU > OPP tables" which will be part of v4.20-rc1 once the arm-soc tree is > merged into mainline > - updated patch description with more details > > > [0] http://lists.infradead.org/pipermail/linux-amlogic/2018-May/007274.html > > > Martin Blumenstingl (1): > ARM: dts: meson8b: drop eth_txd0_1 and eth_txd1_1 from eth_rgmii_pins > > arch/arm/boot/dts/meson8b.dtsi | 2 -- > 1 file changed, 2 deletions(-) >
Hi Jianxin, that was very quick! On Sat, Dec 29, 2018 at 6:17 AM Jianxin Pan <jianxin.pan@amlogic.com> wrote: > > Hi Martin, > > > PERIPHS_PIN_MUX_7: > - register 7 bit 22: ETH_RXD3 (DIF_TTL_2_P) > - register 7 bit 23: ETH_RXD2 (DIF_TTL_2_N) perfect, thank you - that is exactly the information I need to add the missing bits to the pinctrl-meson8b driver finally Odroid-C1 won't drop packets when transferring data anymore and we rely less on the bootloader to set up the pin mux :) > On 2018/12/29 8:08, Martin Blumenstingl wrote: > > Hi Emiliano, Hi Linus, Hi Jianxin, > > > > could you please test the patch from this series on your Odroid-C1? > > I tested it on mine and Ethernet seems to be improve Ethernet transmit > > speeds greatly (at the cost of a small drop in receive performance). > > > > Jianxin, can you please give us the description for pin mux register 7 > > (PERIPHS_PIN_MUX_7) bits 22 and 23 on Meson8b (S805). The public > > datasheet doesn't mention them so we're missing the name of the function > > and the pin(s) which are controlled by each bit. I will send an updated series (which will include a pinctrl-meson8b patch and an updated .dts patch) later on Regards Martin