[2/7] RDMA/bnxt_re: Add 64bit doorbells for 57500 series

Message ID	1546236607-15948-3-git-send-email-devesh.sharma@broadcom.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-rdma-owner@kernel.org> From: Devesh Sharma <devesh.sharma@broadcom.com> To: linux-rdma@vger.kernel.org Cc: dledford@redhat.com, jgg@mellanox.com, Devesh Sharma <devesh.sharma@broadcom.com>, Selvin Xavier <selvin.xavier@broadcom.com> Subject: [PATCH 2/7] RDMA/bnxt_re: Add 64bit doorbells for 57500 series Date: Mon, 31 Dec 2018 01:10:02 -0500 Message-Id: <1546236607-15948-3-git-send-email-devesh.sharma@broadcom.com> In-Reply-To: <1546236607-15948-1-git-send-email-devesh.sharma@broadcom.com> References: <1546236607-15948-1-git-send-email-devesh.sharma@broadcom.com> Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk
Series	Add support Broadcom's 57500 series of adapters \| expand [0/7] Add support Broadcom's 57500 series of adapters [1/7] RDMA/bnxt_re: Add chip context to identify 57500 series [2/7] RDMA/bnxt_re: Add 64bit doorbells for 57500 series [3/7] RDMA/bnxt_re: Skip backing store allocation for 57500 series [4/7] RDMA/bnxt_re: Enable GSI QP support for 57500 series [5/7] RDMA/bnxt_re: Add extended psn structure for 57500 adapters [6/7] RDMA/bnxt_re: Update kernel user abi to pass chip context [7/7] RDMA/bnxt_en: Enable RDMA driver support for 57500 chip

Hi Devesh, I love your patch! Yet something to improve: [auto build test ERROR on rdma/for-next] [also build test ERROR on v4.20 next-20181224] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Devesh-Sharma/Add-support-Broadcom-s-57500-series-of-adapters/20181231-151329 base: https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git for-next config: i386-randconfig-h1-01010806 (attached as .config) compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): In file included from drivers/infiniband/hw/bnxt_re/main.c:61:0: drivers/infiniband/hw/bnxt_re/qplib_fp.h: In function 'bnxt_qplib_ring_nq_db64': >> drivers/infiniband/hw/bnxt_re/qplib_fp.h:450:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration] writeq(*val, db); ^ Cyclomatic Complexity 5 include/linux/compiler.h:__read_once_size Cyclomatic Complexity 5 include/linux/compiler.h:__write_once_size Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_read Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_write Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:set_bit Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:test_and_clear_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:constant_test_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32 Cyclomatic Complexity 1 include/linux/list.h:INIT_LIST_HEAD Cyclomatic Complexity 1 include/linux/list.h:__list_del Cyclomatic Complexity 2 include/linux/list.h:__list_del_entry Cyclomatic Complexity 1 include/linux/list.h:list_empty Cyclomatic Complexity 1 include/linux/list.h:__list_splice Cyclomatic Complexity 2 include/linux/list.h:list_splice_init Cyclomatic Complexity 1 include/linux/string.h:strnlen Cyclomatic Complexity 4 include/linux/string.h:strlen Cyclomatic Complexity 6 include/linux/string.h:strlcpy Cyclomatic Complexity 3 include/linux/string.h:memset Cyclomatic Complexity 4 include/linux/string.h:memcpy Cyclomatic Complexity 4 include/linux/string.h:memcmp Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_read Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_set Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_inc Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_dec Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_read Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_set Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_inc Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_dec Cyclomatic Complexity 1 include/linux/err.h:ERR_PTR Cyclomatic Complexity 1 include/linux/err.h:PTR_ERR Cyclomatic Complexity 1 include/linux/err.h:IS_ERR Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_add Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_sub Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_lock Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_unlock Cyclomatic Complexity 1 include/linux/jiffies.h:_msecs_to_jiffies Cyclomatic Complexity 3 include/linux/jiffies.h:msecs_to_jiffies Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_acquire Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_release Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_lock Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_unlock Cyclomatic Complexity 1 include/linux/workqueue.h:__init_work Cyclomatic Complexity 1 include/linux/workqueue.h:queue_work Cyclomatic Complexity 1 include/linux/workqueue.h:queue_delayed_work Cyclomatic Complexity 1 include/linux/workqueue.h:schedule_delayed_work Cyclomatic Complexity 1 include/linux/module.h:try_module_get Cyclomatic Complexity 1 include/linux/module.h:module_put Cyclomatic Complexity 2 include/linux/rculist.h:__list_add_rcu Cyclomatic Complexity 1 include/linux/rculist.h:list_add_tail_rcu Cyclomatic Complexity 1 include/linux/rculist.h:list_del_rcu Cyclomatic Complexity 68 include/linux/slab.h:kmalloc_large Cyclomatic Complexity 3 include/linux/slab.h:kmalloc Cyclomatic Complexity 1 include/linux/slab.h:kzalloc Cyclomatic Complexity 1 include/linux/netdevice.h:netdev_priv Cyclomatic Complexity 1 include/linux/netdevice.h:netdev_notifier_info_to_dev Cyclomatic Complexity 1 include/linux/netdevice.h:dev_put Cyclomatic Complexity 1 include/linux/netdevice.h:dev_hold Cyclomatic Complexity 1 include/linux/netdevice.h:netif_carrier_ok Cyclomatic Complexity 1 include/linux/if_vlan.h:is_vlan_dev Cyclomatic Complexity 0 include/linux/if_vlan.h:vlan_dev_real_dev Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_set_device_sysfs_group Cyclomatic Complexity 1 include/rdma/ib_addr.h:rdma_vlan_dev_real_dev Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.h:bnxt_qplib_is_chip_gen_p5 Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.h:bnxt_qplib_get_ring_type Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/bnxt_re.h:rdev_to_dev Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_setup_chip_ctx Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_get_sriov_func_type Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_set_resource_limits Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_stop Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_start Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_unregister_netdev Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_register_netdev Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_free_msix Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_init_hwrm_hdr Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_fill_fw_msg Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_net_ring_alloc Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_net_stats_ctx_alloc Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_from_netdev Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_dev_unprobe Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_handle_unaffi_async_event Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_get_nqdb_offset Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_is_qp1_or_shadow_qp Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_parse_cid_map Cyclomatic Complexity 6 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_dev_probe Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_query_hwrm_intf_version Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_net_stats_ctx_free Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_srqn_handler Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_cqn_handler Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_net_ring_free Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_destroy_chip_ctx Cyclomatic Complexity 5 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_handle_qp_async_event Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_handle_affi_async_event Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_aeq_handler Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_sriov_config Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_stop_irq Cyclomatic Complexity 5 drivers/infiniband/hw/bnxt_re/main.c:bnxt_re_start_irq -- In file included from drivers/infiniband/hw/bnxt_re/ib_verbs.c:57:0: drivers/infiniband/hw/bnxt_re/qplib_fp.h: In function 'bnxt_qplib_ring_nq_db64': >> drivers/infiniband/hw/bnxt_re/qplib_fp.h:450:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration] writeq(*val, db); ^ Cyclomatic Complexity 5 include/linux/compiler.h:__write_once_size Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_write Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:constant_test_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls Cyclomatic Complexity 1 include/linux/bitops.h:fls_long Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32 Cyclomatic Complexity 1 include/linux/log2.h:__roundup_pow_of_two Cyclomatic Complexity 3 include/linux/string.h:memset Cyclomatic Complexity 4 include/linux/string.h:memcpy Cyclomatic Complexity 1 include/linux/list.h:INIT_LIST_HEAD Cyclomatic Complexity 2 include/linux/list.h:__list_add Cyclomatic Complexity 1 include/linux/list.h:list_add_tail Cyclomatic Complexity 1 include/linux/list.h:__list_del Cyclomatic Complexity 2 include/linux/list.h:__list_del_entry Cyclomatic Complexity 1 include/linux/list.h:list_del Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order Cyclomatic Complexity 2 arch/x86/include/asm/pgtable_types.h:cachemode2protval Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_inc Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_dec Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_add_return Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_inc Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_dec Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_add_return Cyclomatic Complexity 1 include/linux/err.h:ERR_PTR Cyclomatic Complexity 1 include/linux/err.h:PTR_ERR Cyclomatic Complexity 1 include/linux/err.h:IS_ERR Cyclomatic Complexity 3 include/linux/err.h:IS_ERR_OR_NULL Cyclomatic Complexity 1 include/linux/thread_info.h:check_object_size Cyclomatic Complexity 2 include/linux/thread_info.h:copy_overflow Cyclomatic Complexity 4 include/linux/thread_info.h:check_copy_size Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_add Cyclomatic Complexity 5 arch/x86/include/asm/preempt.h:__preempt_count_sub Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_lock Cyclomatic Complexity 1 include/linux/rcupdate.h:__rcu_read_unlock Cyclomatic Complexity 1 include/linux/spinlock.h:spinlock_check Cyclomatic Complexity 1 include/linux/spinlock.h:spin_lock Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock_irqrestore Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_acquire Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_lock_release Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_lock Cyclomatic Complexity 1 include/linux/rcupdate.h:rcu_read_unlock Cyclomatic Complexity 1 arch/x86/include/asm/io.h:virt_to_phys Cyclomatic Complexity 68 include/linux/slab.h:kmalloc_large Cyclomatic Complexity 3 include/linux/slab.h:kmalloc Cyclomatic Complexity 9 include/linux/slab.h:kmalloc_array Cyclomatic Complexity 1 include/linux/slab.h:kcalloc Cyclomatic Complexity 1 include/linux/slab.h:kzalloc Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_map_single Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_map_page Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_mapping_error Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_unmap_page Cyclomatic Complexity 1 include/linux/dma-mapping.h:valid_dma_direction Cyclomatic Complexity 1 arch/x86/include/asm/dma-mapping.h:get_arch_dma_ops Cyclomatic Complexity 4 include/linux/dma-mapping.h:get_dma_ops Cyclomatic Complexity 1 include/linux/dma-mapping.h:dma_map_single_attrs Cyclomatic Complexity 2 include/linux/dma-mapping.h:dma_unmap_single_attrs Cyclomatic Complexity 2 include/linux/dma-mapping.h:dma_mapping_error Cyclomatic Complexity 2 include/linux/uaccess.h:copy_from_user Cyclomatic Complexity 2 include/linux/uaccess.h:copy_to_user Cyclomatic Complexity 1 include/linux/in.h:ipv4_is_multicast Cyclomatic Complexity 1 include/linux/netdevice.h:netif_running Cyclomatic Complexity 1 include/linux/netdevice.h:dev_hold Cyclomatic Complexity 1 include/linux/netdevice.h:netif_carrier_ok Cyclomatic Complexity 1 include/linux/etherdevice.h:ether_addr_copy Cyclomatic Complexity 1 include/linux/etherdevice.h:ether_addr_equal Cyclomatic Complexity 1 include/linux/if_vlan.h:is_vlan_dev Cyclomatic Complexity 0 include/linux/if_vlan.h:vlan_dev_vlan_id Cyclomatic Complexity 1 include/net/ipv6.h:ipv6_addr_v4mapped Cyclomatic Complexity 3 include/rdma/ib_verbs.h:rdma_gid_attr_network_type Cyclomatic Complexity 6 include/rdma/ib_verbs.h:ib_mtu_enum_to_int Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_wr Cyclomatic Complexity 1 include/rdma/ib_verbs.h:atomic_wr Cyclomatic Complexity 1 include/rdma/ib_verbs.h:ud_wr Cyclomatic Complexity 1 include/rdma/ib_verbs.h:reg_wr Cyclomatic Complexity 2 include/rdma/ib_verbs.h:ib_copy_from_udata Cyclomatic Complexity 2 include/rdma/ib_verbs.h:ib_copy_to_udata Cyclomatic Complexity 1 include/rdma/ib_verbs.h:ib_inc_rkey Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_set_sl Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_get_sl Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_set_port_num Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_set_static_rate Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_get_ah_flags Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_read_grh Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_retrieve_grh Cyclomatic Complexity 1 include/rdma/ib_verbs.h:rdma_ah_set_dgid_raw Cyclomatic Complexity 2 include/rdma/ib_verbs.h:rdma_ah_set_grh Cyclomatic Complexity 6 include/rdma/ib_addr.h:iboe_get_mtu Cyclomatic Complexity 3 include/rdma/ib_addr.h:rdma_link_local_addr Cyclomatic Complexity 4 include/rdma/ib_addr.h:rdma_is_multicast_addr Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/bnxt_re.h:rdev_to_dev Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/ib_verbs.c:__from_ib_access_flags Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/ib_verbs.c:__to_ib_access_flags Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/ib_verbs.c:bnxt_re_build_sgl Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/ib_verbs.c:bnxt_re_create_fence_wqe Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/ib_verbs.c:__from_ib_qp_type Cyclomatic Complexity 7 drivers/infiniband/hw/bnxt_re/ib_verbs.c:__from_ib_qp_state Cyclomatic Complexity 7 drivers/infiniband/hw/bnxt_re/ib_verbs.c:__to_ib_qp_state -- In file included from drivers/infiniband/hw/bnxt_re/qplib_res.c:50:0: drivers/infiniband/hw/bnxt_re/qplib_rcfw.h: In function 'bnxt_qplib_ring_creq_db64': >> drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:175:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration] writeq(*val, db); ^ Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:clear_bit Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:test_and_set_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls Cyclomatic Complexity 1 include/linux/bitops.h:fls_long Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32 Cyclomatic Complexity 1 include/linux/log2.h:__roundup_pow_of_two Cyclomatic Complexity 3 include/linux/string.h:memset Cyclomatic Complexity 4 include/linux/string.h:memcpy Cyclomatic Complexity 4 include/linux/string.h:memcmp Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:native_save_fl Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_local_save_flags Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_irqs_disabled_flags Cyclomatic Complexity 1 include/linux/spinlock.h:spinlock_check Cyclomatic Complexity 68 include/linux/slab.h:kmalloc_large Cyclomatic Complexity 3 include/linux/slab.h:kmalloc Cyclomatic Complexity 9 include/linux/slab.h:kmalloc_array Cyclomatic Complexity 1 include/linux/slab.h:kcalloc Cyclomatic Complexity 1 include/linux/mm.h:lowmem_page_address Cyclomatic Complexity 1 include/linux/scatterlist.h:sg_page Cyclomatic Complexity 1 include/linux/scatterlist.h:sg_virt Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_alloc_coherent Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_free_coherent Cyclomatic Complexity 1 arch/x86/include/asm/dma-mapping.h:get_arch_dma_ops Cyclomatic Complexity 4 include/linux/dma-mapping.h:get_dma_ops Cyclomatic Complexity 7 include/linux/dma-mapping.h:dma_alloc_attrs Cyclomatic Complexity 72 include/linux/dma-mapping.h:dma_free_attrs Cyclomatic Complexity 2 include/linux/dma-mapping.h:dma_alloc_coherent Cyclomatic Complexity 1 include/linux/dma-mapping.h:dma_free_coherent Cyclomatic Complexity 1 include/linux/dma-mapping.h:dma_zalloc_coherent Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_init_sgid_tbl Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_pkey_tbl Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_pd_tbl Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_cleanup_pkey_tbl Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_stats_ctx Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/qplib_res.c:__free_pbl Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_pkey_tbl Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_sgid_tbl Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_pd_tbl Cyclomatic Complexity 5 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_sgid_tbl Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/qplib_res.c:__alloc_pbl Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_stats_ctx Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_cleanup_sgid_tbl Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_init_pkey_tbl Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_dpi_tbl Cyclomatic Complexity 11 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_dpi_tbl Cyclomatic Complexity 5 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_hwq Cyclomatic Complexity 218 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_init_hwq Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_ctx Cyclomatic Complexity 19 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_ctx Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_get_guid Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_pd Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_dealloc_pd Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_dpi Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_dealloc_dpi Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_cleanup_res Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_init_res Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_free_res Cyclomatic Complexity 5 drivers/infiniband/hw/bnxt_re/qplib_res.c:bnxt_qplib_alloc_res cc1: some warnings being treated as errors -- In file included from drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:49:0: drivers/infiniband/hw/bnxt_re/qplib_rcfw.h: In function 'bnxt_qplib_ring_creq_db64': >> drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:175:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration] writeq(*val, db); ^ Cyclomatic Complexity 1 include/linux/kasan-checks.h:kasan_check_write Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:set_bit Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:clear_bit Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:test_and_set_bit Cyclomatic Complexity 2 arch/x86/include/asm/bitops.h:test_and_clear_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:constant_test_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:variable_test_bit Cyclomatic Complexity 1 arch/x86/include/asm/bitops.h:fls Cyclomatic Complexity 1 include/linux/log2.h:__ilog2_u32 Cyclomatic Complexity 3 include/linux/string.h:memset Cyclomatic Complexity 4 include/linux/string.h:memcpy Cyclomatic Complexity 1 include/asm-generic/getorder.h:__get_order Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_inc Cyclomatic Complexity 1 arch/x86/include/asm/atomic.h:arch_atomic_dec Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_inc Cyclomatic Complexity 1 include/asm-generic/atomic-instrumented.h:atomic_dec Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:native_save_fl Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_local_save_flags Cyclomatic Complexity 1 arch/x86/include/asm/irqflags.h:arch_irqs_disabled_flags Cyclomatic Complexity 1 arch/x86/include/asm/processor.h:prefetch Cyclomatic Complexity 1 include/linux/spinlock.h:spinlock_check Cyclomatic Complexity 1 include/linux/spinlock.h:spin_unlock_irqrestore Cyclomatic Complexity 1 include/linux/jiffies.h:_msecs_to_jiffies Cyclomatic Complexity 3 include/linux/jiffies.h:msecs_to_jiffies Cyclomatic Complexity 1 include/linux/interrupt.h:request_irq Cyclomatic Complexity 2 include/linux/interrupt.h:tasklet_schedule Cyclomatic Complexity 1 include/linux/interrupt.h:tasklet_disable_nosync Cyclomatic Complexity 1 include/linux/interrupt.h:tasklet_disable Cyclomatic Complexity 1 include/linux/interrupt.h:tasklet_enable Cyclomatic Complexity 1 arch/x86/include/asm/io.h:writel Cyclomatic Complexity 68 include/linux/slab.h:kmalloc_large Cyclomatic Complexity 3 include/linux/slab.h:kmalloc Cyclomatic Complexity 9 include/linux/slab.h:kmalloc_array Cyclomatic Complexity 1 include/linux/slab.h:kcalloc Cyclomatic Complexity 1 include/linux/slab.h:kzalloc Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_alloc_coherent Cyclomatic Complexity 1 include/linux/dma-debug.h:debug_dma_free_coherent Cyclomatic Complexity 1 arch/x86/include/asm/dma-mapping.h:get_arch_dma_ops Cyclomatic Complexity 4 include/linux/dma-mapping.h:get_dma_ops Cyclomatic Complexity 7 include/linux/dma-mapping.h:dma_alloc_attrs Cyclomatic Complexity 72 include/linux/dma-mapping.h:dma_free_attrs Cyclomatic Complexity 2 include/linux/dma-mapping.h:dma_alloc_coherent Cyclomatic Complexity 1 include/linux/dma-mapping.h:dma_free_coherent Cyclomatic Complexity 1 include/linux/dma-mapping.h:dma_zalloc_coherent Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_res.h:bnxt_qplib_is_chip_gen_p5 Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_res.h:bnxt_qplib_get_hwq_type Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_cmdqe_npages Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_cmdqe_page_size Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_cmdqe_cnt_per_pg Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_max_cmdq_idx_per_pg Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:get_cmdq_pg Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:get_cmdq_idx Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:get_creq_pg Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:get_creq_idx Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_ring_creq_db64 Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_ring_creq_db_rearm Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.h:bnxt_qplib_ring_creq_db Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_process_func_event Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_creq_irq Cyclomatic Complexity 7 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:__get_pbl_pg_idx Cyclomatic Complexity 15 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:__send_message Cyclomatic Complexity 11 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_process_qp_event Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_service_creq Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:__block_for_resp Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:__wait_for_resp Cyclomatic Complexity 9 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_rcfw_send_message Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_deinit_rcfw Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_init_rcfw Cyclomatic Complexity 1 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_free_rcfw_channel Cyclomatic Complexity 6 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_alloc_rcfw_channel Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_rcfw_stop_irq Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_disable_rcfw_channel Cyclomatic Complexity 4 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_rcfw_start_irq Cyclomatic Complexity 8 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_enable_rcfw_channel Cyclomatic Complexity 3 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_rcfw_alloc_sbuf Cyclomatic Complexity 2 drivers/infiniband/hw/bnxt_re/qplib_rcfw.c:bnxt_qplib_rcfw_free_sbuf cc1: some warnings being treated as errors .. vim +/writeq +450 drivers/infiniband/hw/bnxt_re/qplib_fp.h 425 426 #define NQ_CONS_PCI_BAR_REGION 2 427 #define NQ_DB_KEY_CP (0x2 << CMPL_DOORBELL_KEY_SFT) 428 #define NQ_DB_IDX_VALID CMPL_DOORBELL_IDX_VALID 429 #define NQ_DB_IRQ_DIS CMPL_DOORBELL_MASK 430 #define NQ_DB_CP_FLAGS_REARM (NQ_DB_KEY_CP | \ 431 NQ_DB_IDX_VALID) 432 #define NQ_DB_CP_FLAGS (NQ_DB_KEY_CP | \ 433 NQ_DB_IDX_VALID | \ 434 NQ_DB_IRQ_DIS) 435 436 static inline void bnxt_qplib_ring_nq_db64(void __iomem *db, u32 index, 437 u16 xid, bool arm) 438 { 439 struct dbc_dbc hdr64 = { 0 }; 440 u32 tmp = 0; 441 u64 *val; 442 443 hdr64.index = cpu_to_le32(index & DBC_DBC_INDEX_MASK); 444 tmp = xid & DBC_DBC_XID_MASK; 445 tmp |= DBC_DBC_PATH_ROCE; 446 tmp |= arm ? DBC_DBC_TYPE_NQ_ARM : DBC_DBC_TYPE_NQ; 447 hdr64.type_path_xid = cpu_to_le32(tmp); 448 val = (u64 *)&hdr64.index; 449 wmb(); > 450 writeq(*val, db); 451 } 452 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c index 1e2515e..7bb3bc3 100644 --- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c +++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c @@ -3301,10 +3301,10 @@ int bnxt_re_req_notify_cq(struct ib_cq *ib_cq, spin_lock_irqsave(&cq->cq_lock, flags); /* Trigger on the very next completion */ if (ib_cqn_flags & IB_CQ_NEXT_COMP) - type = DBR_DBR_TYPE_CQ_ARMALL; + type = DBC_DBC_TYPE_CQ_ARMALL; /* Trigger on the next solicited completion */ else if (ib_cqn_flags & IB_CQ_SOLICITED) - type = DBR_DBR_TYPE_CQ_ARMSE; + type = DBC_DBC_TYPE_CQ_ARMSE; /* Poll to see if there are missed events */ if ((ib_cqn_flags & IB_CQ_REPORT_MISSED_EVENTS) && diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c index e3e1944..dd3f56a 100644 --- a/drivers/infiniband/hw/bnxt_re/main.c +++ b/drivers/infiniband/hw/bnxt_re/main.c @@ -378,7 +378,8 @@ static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, fw_msg->timeout = timeout; } -static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id) +static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id, + int type) { struct bnxt_en_dev *en_dev = rdev->en_dev; struct hwrm_ring_free_input req = {0}; @@ -392,7 +393,7 @@ static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id) memset(&fw_msg, 0, sizeof(fw_msg)); bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); - req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; + req.ring_type = type; req.ring_id = cpu_to_le16(fw_ring_id); bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); @@ -429,7 +430,7 @@ static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, /* Association of ring index with doorbell index and MSIX number */ req.logical_id = cpu_to_le16(map_index); req.length = cpu_to_le32(ring_mask + 1); - req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; + req.ring_type = type; req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); @@ -891,6 +892,12 @@ static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, return 0; } +static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx) +{ + return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 0x10000 : + rdev->msix_entries[indx].db_offset; +} + static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) { int i; @@ -904,18 +911,18 @@ static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) static int bnxt_re_init_res(struct bnxt_re_dev *rdev) { - int rc = 0, i; int num_vec_enabled = 0; + int rc = 0, i; + u32 db_offt; bnxt_qplib_init_res(&rdev->qplib_res); for (i = 1; i < rdev->num_msix ; i++) { + db_offt = bnxt_re_get_nqdb_offset(rdev, i); rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], i - 1, rdev->msix_entries[i].vector, - rdev->msix_entries[i].db_offset, - &bnxt_re_cqn_handler, + db_offt, &bnxt_re_cqn_handler, &bnxt_re_srqn_handler); - if (rc) { dev_err(rdev_to_dev(rdev), "Failed to enable NQ with rc = 0x%x", rc); @@ -927,17 +934,18 @@ static int bnxt_re_init_res(struct bnxt_re_dev *rdev) fail: for (i = num_vec_enabled; i >= 0; i--) bnxt_qplib_disable_nq(&rdev->nq[i]); - return rc; } static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) { + u8 type; int i; for (i = 0; i < rdev->num_msix - 1; i++) { + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); + bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); rdev->nq[i].res = NULL; - bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id); bnxt_qplib_free_nq(&rdev->nq[i]); } } @@ -961,6 +969,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) { int rc = 0, i; int num_vec_created = 0; + u8 type; /* Configure and allocate resources for qplib */ rdev->qplib_res.rcfw = &rdev->rcfw; @@ -990,11 +999,11 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) i, rc); goto free_nq; } + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); rc = bnxt_re_net_ring_alloc (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr, rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count, - HWRM_RING_ALLOC_CMPL, - BNXT_QPLIB_NQE_MAX_CNT - 1, + type, BNXT_QPLIB_NQE_MAX_CNT - 1, rdev->msix_entries[i + 1].ring_idx, &rdev->nq[i].ring_id); if (rc) { @@ -1009,7 +1018,8 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) return 0; free_nq: for (i = num_vec_created; i >= 0; i--) { - bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id); + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); + bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); bnxt_qplib_free_nq(&rdev->nq[i]); } bnxt_qplib_dealloc_dpi(&rdev->qplib_res, @@ -1263,6 +1273,7 @@ static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev) static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev) { + u8 type; int rc; if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { @@ -1286,7 +1297,8 @@ static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev) bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); - bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); + bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type); bnxt_qplib_free_rcfw_channel(&rdev->rcfw); } if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { @@ -1317,9 +1329,10 @@ static void bnxt_re_worker(struct work_struct *work) static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) { - int rc; - bool locked; + u32 db_offt; + u8 type; + int rc; /* Acquire rtnl lock through out this function */ rtnl_lock(); @@ -1363,21 +1376,23 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) pr_err("Failed to allocate RCFW Channel: %#x\n", rc); goto fail; } + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); rc = bnxt_re_net_ring_alloc (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr, rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count, - HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1, + type, BNXT_QPLIB_CREQE_MAX_CNT - 1, rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx, &rdev->rcfw.creq_ring_id); if (rc) { pr_err("Failed to allocate CREQ: %#x\n", rc); goto free_rcfw; } - rc = bnxt_qplib_enable_rcfw_channel - (rdev->en_dev->pdev, &rdev->rcfw, - rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, - rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset, - rdev->is_virtfn, &bnxt_re_aeq_handler); + + db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX); + rc = bnxt_qplib_enable_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, + rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, + db_offt, rdev->is_virtfn, + &bnxt_re_aeq_handler); if (rc) { pr_err("Failed to enable RCFW channel: %#x\n", rc); goto free_ring; @@ -1461,7 +1476,8 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) disable_rcfw: bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); free_ring: - bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); + type = bnxt_qplib_get_ring_type(rdev->chip_ctx); + bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type); free_rcfw: bnxt_qplib_free_rcfw_channel(&rdev->rcfw); fail: diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.c b/drivers/infiniband/hw/bnxt_re/qplib_fp.c index b98b054..ae95a4a 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_fp.c +++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.c @@ -244,6 +244,7 @@ static void bnxt_qplib_service_nq(unsigned long data) u16 type; int budget = nq->budget; uintptr_t q_handle; + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(nq->res->cctx); /* Service the NQ until empty */ raw_cons = hwq->cons; @@ -290,7 +291,7 @@ static void bnxt_qplib_service_nq(unsigned long data) q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) << 32; bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle, - DBR_DBR_TYPE_SRQ_ARMENA); + DBC_DBC_TYPE_SRQ_ARMENA); if (!nq->srqn_handler(nq, (struct bnxt_qplib_srq *)q_handle, nqsrqe->event)) @@ -312,7 +313,8 @@ static void bnxt_qplib_service_nq(unsigned long data) } if (hwq->cons != raw_cons) { hwq->cons = raw_cons; - NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements); + bnxt_qplib_ring_nq_db_rearm(nq->bar_reg_iomem, hwq->cons, + hwq->max_elements, nq->ring_id, gen_p5); } } @@ -336,9 +338,11 @@ static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill) { + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(nq->res->cctx); tasklet_disable(&nq->worker); /* Mask h/w interrupt */ - NQ_DB(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements); + bnxt_qplib_ring_nq_db(nq->bar_reg_iomem, nq->hwq.cons, + nq->hwq.max_elements, nq->ring_id, gen_p5); /* Sync with last running IRQ handler */ synchronize_irq(nq->vector); if (kill) @@ -373,6 +377,7 @@ void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq) int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx, int msix_vector, bool need_init) { + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(nq->res->cctx); int rc; if (nq->requested) @@ -399,7 +404,8 @@ int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx, nq->vector, nq_indx); } nq->requested = true; - NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements); + bnxt_qplib_ring_nq_db_rearm(nq->bar_reg_iomem, nq->hwq.cons, + nq->hwq.max_elements, nq->ring_id, gen_p5); return rc; } @@ -433,7 +439,8 @@ int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, rc = -ENOMEM; goto fail; } - nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4); + /* Unconditionally map 8 bytes to support 57500 series */ + nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 8); if (!nq->bar_reg_iomem) { rc = -ENOMEM; goto fail; @@ -462,15 +469,17 @@ void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq) int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq) { + u8 hwq_type; + nq->pdev = pdev; if (!nq->hwq.max_elements || nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT) nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; - + hwq_type = bnxt_qplib_get_hwq_type(nq->res); if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0, &nq->hwq.max_elements, BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0, - PAGE_SIZE, HWQ_TYPE_L2_CMPL)) + PAGE_SIZE, hwq_type)) return -ENOMEM; nq->budget = 8; @@ -481,19 +490,19 @@ int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq) static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type) { struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; - struct dbr_dbr db_msg = { 0 }; + struct dbc_dbc db_msg = { 0 }; void __iomem *db; u32 sw_prod = 0; /* Ring DB */ - sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold : + sw_prod = (arm_type == DBC_DBC_TYPE_SRQ_ARM) ? srq->threshold : HWQ_CMP(srq_hwq->prod, srq_hwq); - db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & - DBR_DBR_INDEX_MASK); - db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) & - DBR_DBR_XID_MASK) | arm_type); - db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ? - srq->dbr_base : srq->dpi->dbr; + db_msg.index = cpu_to_le32((sw_prod << DBC_DBC_INDEX_SFT) & + DBC_DBC_INDEX_MASK); + db_msg.type_path_xid = cpu_to_le32(((srq->id << DBC_DBC_XID_SFT) & + DBC_DBC_XID_MASK) | arm_type); + db = (arm_type == DBC_DBC_TYPE_SRQ_ARMENA) ? + srq->dbr_base : srq->dpi->dbr; wmb(); /* barrier before db ring */ __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64)); } @@ -590,7 +599,7 @@ int bnxt_qplib_create_srq(struct bnxt_qplib_res *res, srq->id = le32_to_cpu(resp.xid); srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; if (srq->threshold) - bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA); + bnxt_qplib_arm_srq(srq, DBC_DBC_TYPE_SRQ_ARMENA); srq->arm_req = false; return 0; @@ -614,7 +623,7 @@ int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res, srq_hwq->max_elements - sw_cons + sw_prod; if (count > srq->threshold) { srq->arm_req = false; - bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); + bnxt_qplib_arm_srq(srq, DBC_DBC_TYPE_SRQ_ARM); } else { /* Deferred arming */ srq->arm_req = true; @@ -702,10 +711,10 @@ int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq, srq_hwq->max_elements - sw_cons + sw_prod; spin_unlock(&srq_hwq->lock); /* Ring DB */ - bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ); + bnxt_qplib_arm_srq(srq, DBC_DBC_TYPE_SRQ); if (srq->arm_req == true && count > srq->threshold) { srq->arm_req = false; - bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); + bnxt_qplib_arm_srq(srq, DBC_DBC_TYPE_SRQ_ARM); } done: return rc; @@ -1494,16 +1503,16 @@ void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp, void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp) { struct bnxt_qplib_q *sq = &qp->sq; - struct dbr_dbr db_msg = { 0 }; + struct dbc_dbc db_msg = { 0 }; u32 sw_prod; sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); - db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & - DBR_DBR_INDEX_MASK); - db_msg.type_xid = - cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | - DBR_DBR_TYPE_SQ); + db_msg.index = cpu_to_le32((sw_prod << DBC_DBC_INDEX_SFT) & + DBC_DBC_INDEX_MASK); + db_msg.type_path_xid = cpu_to_le32(((qp->id << DBC_DBC_XID_SFT) & + DBC_DBC_XID_MASK) | + DBC_DBC_TYPE_SQ); /* Flush all the WQE writes to HW */ wmb(); __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); @@ -1785,15 +1794,15 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp) { struct bnxt_qplib_q *rq = &qp->rq; - struct dbr_dbr db_msg = { 0 }; + struct dbc_dbc db_msg = { 0 }; u32 sw_prod; sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); - db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & - DBR_DBR_INDEX_MASK); - db_msg.type_xid = - cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | - DBR_DBR_TYPE_RQ); + db_msg.index = cpu_to_le32((sw_prod << DBC_DBC_INDEX_SFT) & + DBC_DBC_INDEX_MASK); + db_msg.type_path_xid = cpu_to_le32(((qp->id << DBC_DBC_XID_SFT) & + DBC_DBC_XID_MASK) | + DBC_DBC_TYPE_RQ); /* Flush the writes to HW Rx WQE before the ringing Rx DB */ wmb(); @@ -1881,11 +1890,11 @@ int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, /* Spinlock must be held */ static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq) { - struct dbr_dbr db_msg = { 0 }; + struct dbc_dbc db_msg = { 0 }; - db_msg.type_xid = - cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | - DBR_DBR_TYPE_CQ_ARMENA); + db_msg.type_path_xid = cpu_to_le32(((cq->id << DBC_DBC_XID_SFT) & + DBC_DBC_XID_MASK) | + DBC_DBC_TYPE_CQ_ARMENA); /* Flush memory writes before enabling the CQ */ wmb(); __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64)); @@ -1894,16 +1903,15 @@ static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq) static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type) { struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; - struct dbr_dbr db_msg = { 0 }; + struct dbc_dbc db_msg = { 0 }; u32 sw_cons; /* Ring DB */ sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq); - db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) & - DBR_DBR_INDEX_MASK); - db_msg.type_xid = - cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | - arm_type); + db_msg.index = cpu_to_le32((sw_cons << DBC_DBC_INDEX_SFT) & + DBC_DBC_INDEX_MASK); + db_msg.type_path_xid = cpu_to_le32(((cq->id << DBC_DBC_XID_SFT) & + DBC_DBC_XID_MASK) | arm_type); /* flush memory writes before arming the CQ */ wmb(); __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); @@ -2125,7 +2133,7 @@ static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, sq->send_phantom = true; /* TODO: Only ARM if the previous SQE is ARMALL */ - bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL); + bnxt_qplib_arm_cq(cq, DBC_DBC_TYPE_CQ_ARMALL); rc = -EAGAIN; goto out; @@ -2794,7 +2802,7 @@ int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, } if (cq->hwq.cons != raw_cons) { cq->hwq.cons = raw_cons; - bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ); + bnxt_qplib_arm_cq(cq, DBC_DBC_TYPE_CQ); } exit: return num_cqes - budget; diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.h b/drivers/infiniband/hw/bnxt_re/qplib_fp.h index f317bae..c686dbf 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_fp.h +++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.h @@ -432,10 +432,47 @@ struct bnxt_qplib_cq { #define NQ_DB_CP_FLAGS (NQ_DB_KEY_CP | \ NQ_DB_IDX_VALID | \ NQ_DB_IRQ_DIS) -#define NQ_DB_REARM(db, raw_cons, cp_bit) \ - writel(NQ_DB_CP_FLAGS_REARM | ((raw_cons) & ((cp_bit) - 1)), db) -#define NQ_DB(db, raw_cons, cp_bit) \ - writel(NQ_DB_CP_FLAGS | ((raw_cons) & ((cp_bit) - 1)), db) + +static inline void bnxt_qplib_ring_nq_db64(void __iomem *db, u32 index, + u16 xid, bool arm) +{ + struct dbc_dbc hdr64 = { 0 }; + u32 tmp = 0; + u64 *val; + + hdr64.index = cpu_to_le32(index & DBC_DBC_INDEX_MASK); + tmp = xid & DBC_DBC_XID_MASK; + tmp |= DBC_DBC_PATH_ROCE; + tmp |= arm ? DBC_DBC_TYPE_NQ_ARM : DBC_DBC_TYPE_NQ; + hdr64.type_path_xid = cpu_to_le32(tmp); + val = (u64 *)&hdr64.index; + wmb(); + writeq(*val, db); +} + +static inline void bnxt_qplib_ring_nq_db_rearm(void __iomem *db, u32 raw_cons, + u32 max_elements, u16 xid, + bool gen_p5) +{ + u32 index = raw_cons & (max_elements - 1); + + if (gen_p5) + bnxt_qplib_ring_nq_db64(db, index, xid, true); + else + writel(NQ_DB_CP_FLAGS_REARM | (index & DBC_DBC32_XID_MASK), db); +} + +static inline void bnxt_qplib_ring_nq_db(void __iomem *db, u32 raw_cons, + u32 max_elements, u16 xid, + bool gen_p5) +{ + u32 index = raw_cons & (max_elements - 1); + + if (gen_p5) + bnxt_qplib_ring_nq_db64(db, index, xid, false); + else + writel(NQ_DB_CP_FLAGS | (index & DBC_DBC32_XID_MASK), db); +} struct bnxt_qplib_nq { struct pci_dev *pdev; diff --git a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.c b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.c index 3268054..e8472f3 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.c +++ b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.c @@ -359,11 +359,12 @@ static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw, static void bnxt_qplib_service_creq(unsigned long data) { struct bnxt_qplib_rcfw *rcfw = (struct bnxt_qplib_rcfw *)data; + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx); struct bnxt_qplib_hwq *creq = &rcfw->creq; + u32 type, budget = CREQ_ENTRY_POLL_BUDGET; struct creq_base *creqe, **creq_ptr; u32 sw_cons, raw_cons; unsigned long flags; - u32 type, budget = CREQ_ENTRY_POLL_BUDGET; /* Service the CREQ until budget is over */ spin_lock_irqsave(&creq->lock, flags); @@ -407,8 +408,8 @@ static void bnxt_qplib_service_creq(unsigned long data) if (creq->cons != raw_cons) { creq->cons = raw_cons; - CREQ_DB_REARM(rcfw->creq_bar_reg_iomem, raw_cons, - creq->max_elements); + bnxt_qplib_ring_creq_db_rearm(rcfw->creq_bar_reg_iomem, raw_cons, + creq->max_elements, rcfw->creq_ring_id, gen_p5); } spin_unlock_irqrestore(&creq->lock, flags); } @@ -560,12 +561,15 @@ int bnxt_qplib_alloc_rcfw_channel(struct pci_dev *pdev, struct bnxt_qplib_ctx *ctx, int qp_tbl_sz) { + u8 hwq_type; + rcfw->pdev = pdev; rcfw->creq.max_elements = BNXT_QPLIB_CREQE_MAX_CNT; + hwq_type = bnxt_qplib_get_hwq_type(rcfw->res); if (bnxt_qplib_alloc_init_hwq(rcfw->pdev, &rcfw->creq, NULL, 0, &rcfw->creq.max_elements, - BNXT_QPLIB_CREQE_UNITS, 0, PAGE_SIZE, - HWQ_TYPE_L2_CMPL)) { + BNXT_QPLIB_CREQE_UNITS, + 0, PAGE_SIZE, hwq_type)) { dev_err(&rcfw->pdev->dev, "HW channel CREQ allocation failed\n"); goto fail; @@ -607,10 +611,12 @@ int bnxt_qplib_alloc_rcfw_channel(struct pci_dev *pdev, void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill) { + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx); + tasklet_disable(&rcfw->worker); /* Mask h/w interrupts */ - CREQ_DB(rcfw->creq_bar_reg_iomem, rcfw->creq.cons, - rcfw->creq.max_elements); + bnxt_qplib_ring_creq_db(rcfw->creq_bar_reg_iomem, rcfw->creq.cons, + rcfw->creq.max_elements, rcfw->creq_ring_id, gen_p5); /* Sync with last running IRQ-handler */ synchronize_irq(rcfw->vector); if (kill) @@ -647,6 +653,7 @@ void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw) int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, bool need_init) { + bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx); int rc; if (rcfw->requested) @@ -663,8 +670,8 @@ int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, if (rc) return rc; rcfw->requested = true; - CREQ_DB_REARM(rcfw->creq_bar_reg_iomem, rcfw->creq.cons, - rcfw->creq.max_elements); + bnxt_qplib_ring_creq_db_rearm(rcfw->creq_bar_reg_iomem, rcfw->creq.cons, + rcfw->creq.max_elements, rcfw->creq_ring_id, gen_p5); return 0; } @@ -718,8 +725,9 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, dev_err(&rcfw->pdev->dev, "CREQ BAR region %d resc start is 0!\n", rcfw->creq_bar_reg); + /* Unconditionally map 8 bytes to support 57500 series */ rcfw->creq_bar_reg_iomem = ioremap_nocache(res_base + cp_bar_reg_off, - 4); + 8); if (!rcfw->creq_bar_reg_iomem) { dev_err(&rcfw->pdev->dev, "CREQ BAR region %d mapping failed\n", rcfw->creq_bar_reg); diff --git a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h index 8011d67..412a2a4 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h +++ b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h @@ -157,10 +157,45 @@ static inline u32 get_creq_idx(u32 val) #define CREQ_DB_CP_FLAGS (CREQ_DB_KEY_CP | \ CREQ_DB_IDX_VALID | \ CREQ_DB_IRQ_DIS) -#define CREQ_DB_REARM(db, raw_cons, cp_bit) \ - writel(CREQ_DB_CP_FLAGS_REARM | ((raw_cons) & ((cp_bit) - 1)), db) -#define CREQ_DB(db, raw_cons, cp_bit) \ - writel(CREQ_DB_CP_FLAGS | ((raw_cons) & ((cp_bit) - 1)), db) + +static inline void bnxt_qplib_ring_creq_db64(void __iomem *db, u32 index, + u16 xid, bool arm) +{ + struct dbc_dbc hdr64 = { 0 }; + u32 tmp = 0; + u64 *val; + + hdr64.index = cpu_to_le32(index & DBC_DBC_INDEX_MASK); + tmp = xid & DBC_DBC_XID_MASK; + tmp |= DBC_DBC_PATH_ROCE; + tmp |= arm ? DBC_DBC_TYPE_NQ_ARM : DBC_DBC_TYPE_NQ; + hdr64.type_path_xid = cpu_to_le32(tmp); + val = (u64 *)&hdr64.index; + wmb(); + writeq(*val, db); +} + +static inline void bnxt_qplib_ring_creq_db_rearm(void __iomem *db, u32 raw_cons, + u32 max_elements, u16 xid, + bool gen_p5) +{ + u32 index = raw_cons & (max_elements - 1); + if (gen_p5) + bnxt_qplib_ring_creq_db64(db, index, xid, true); + else + writel(CREQ_DB_CP_FLAGS_REARM | (index & DBC_DBC32_XID_MASK), db); +} + +static inline void bnxt_qplib_ring_creq_db(void __iomem *db, u32 raw_cons, + u32 max_elements, u16 xid, + bool gen_p5) +{ + u32 index = raw_cons & (max_elements - 1); + if (gen_p5) + bnxt_qplib_ring_creq_db64(db, index, xid, true); + else + writel(CREQ_DB_CP_FLAGS | (index & DBC_DBC32_XID_MASK), db); +} #define CREQ_ENTRY_POLL_BUDGET 0x100 diff --git a/drivers/infiniband/hw/bnxt_re/qplib_res.h b/drivers/infiniband/hw/bnxt_re/qplib_res.h index 9ad1843..fa0fc8a 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_res.h +++ b/drivers/infiniband/hw/bnxt_re/qplib_res.h @@ -206,6 +206,17 @@ static inline bool bnxt_qplib_is_chip_gen_p5(struct bnxt_qplib_chip_ctx *cctx) return (cctx->chip_num == CHIP_NUM_57500); } +static inline u8 bnxt_qplib_get_hwq_type(struct bnxt_qplib_res *res) +{ + return bnxt_qplib_is_chip_gen_p5(res->cctx) ? + HWQ_TYPE_QUEUE : HWQ_TYPE_L2_CMPL; +} + +static inline u8 bnxt_qplib_get_ring_type(struct bnxt_qplib_chip_ctx *cctx) { + return bnxt_qplib_is_chip_gen_p5(cctx) ? RING_ALLOC_REQ_RING_TYPE_NQ : + RING_ALLOC_REQ_RING_TYPE_ROCE_CMPL; +} + #define to_bnxt_qplib(ptr, type, member) \ container_of(ptr, type, member) diff --git a/drivers/infiniband/hw/bnxt_re/roce_hsi.h b/drivers/infiniband/hw/bnxt_re/roce_hsi.h index 8a9ead4..4dbdf9d 100644 --- a/drivers/infiniband/hw/bnxt_re/roce_hsi.h +++ b/drivers/infiniband/hw/bnxt_re/roce_hsi.h @@ -71,46 +71,56 @@ struct status_doorbell { /* RoCE Host Structures */ /* Doorbell Structures */ -/* 64b Doorbell Format (8 bytes) */ -struct dbr_dbr { - __le32 index; - #define DBR_DBR_INDEX_MASK 0xfffffUL - #define DBR_DBR_INDEX_SFT 0 - #define DBR_DBR_RESERVED12_MASK 0xfff00000UL - #define DBR_DBR_RESERVED12_SFT 20 - __le32 type_xid; - #define DBR_DBR_XID_MASK 0xfffffUL - #define DBR_DBR_XID_SFT 0 - #define DBR_DBR_RESERVED8_MASK 0xff00000UL - #define DBR_DBR_RESERVED8_SFT 20 - #define DBR_DBR_TYPE_MASK 0xf0000000UL - #define DBR_DBR_TYPE_SFT 28 - #define DBR_DBR_TYPE_SQ (0x0UL << 28) - #define DBR_DBR_TYPE_RQ (0x1UL << 28) - #define DBR_DBR_TYPE_SRQ (0x2UL << 28) - #define DBR_DBR_TYPE_SRQ_ARM (0x3UL << 28) - #define DBR_DBR_TYPE_CQ (0x4UL << 28) - #define DBR_DBR_TYPE_CQ_ARMSE (0x5UL << 28) - #define DBR_DBR_TYPE_CQ_ARMALL (0x6UL << 28) - #define DBR_DBR_TYPE_CQ_ARMENA (0x7UL << 28) - #define DBR_DBR_TYPE_SRQ_ARMENA (0x8UL << 28) - #define DBR_DBR_TYPE_CQ_CUTOFF_ACK (0x9UL << 28) - #define DBR_DBR_TYPE_NULL (0xfUL << 28) -}; - -/* 32b Doorbell Format (4 bytes) */ -struct dbr_dbr32 { - __le32 type_abs_incr_xid; - #define DBR_DBR32_XID_MASK 0xfffffUL - #define DBR_DBR32_XID_SFT 0 - #define DBR_DBR32_RESERVED4_MASK 0xf00000UL - #define DBR_DBR32_RESERVED4_SFT 20 - #define DBR_DBR32_INCR_MASK 0xf000000UL - #define DBR_DBR32_INCR_SFT 24 - #define DBR_DBR32_ABS 0x10000000UL - #define DBR_DBR32_TYPE_MASK 0xe0000000UL - #define DBR_DBR32_TYPE_SFT 29 - #define DBR_DBR32_TYPE_SQ (0x0UL << 29) +/* dbc_dbc (size:64b/8B) */ +struct dbc_dbc { + __le32 index; + #define DBC_DBC_INDEX_MASK 0xffffffUL + #define DBC_DBC_INDEX_SFT 0 + __le32 type_path_xid; + #define DBC_DBC_XID_MASK 0xfffffUL + #define DBC_DBC_XID_SFT 0 + #define DBC_DBC_PATH_MASK 0x3000000UL + #define DBC_DBC_PATH_SFT 24 + #define DBC_DBC_PATH_ROCE (0x0UL << 24) + #define DBC_DBC_PATH_L2 (0x1UL << 24) + #define DBC_DBC_PATH_ENGINE (0x2UL << 24) + #define DBC_DBC_PATH_LAST DBC_DBC_PATH_ENGINE + #define DBC_DBC_DEBUG_TRACE 0x8000000UL + #define DBC_DBC_TYPE_MASK 0xf0000000UL + #define DBC_DBC_TYPE_SFT 28 + #define DBC_DBC_TYPE_SQ (0x0UL << 28) + #define DBC_DBC_TYPE_RQ (0x1UL << 28) + #define DBC_DBC_TYPE_SRQ (0x2UL << 28) + #define DBC_DBC_TYPE_SRQ_ARM (0x3UL << 28) + #define DBC_DBC_TYPE_CQ (0x4UL << 28) + #define DBC_DBC_TYPE_CQ_ARMSE (0x5UL << 28) + #define DBC_DBC_TYPE_CQ_ARMALL (0x6UL << 28) + #define DBC_DBC_TYPE_CQ_ARMENA (0x7UL << 28) + #define DBC_DBC_TYPE_SRQ_ARMENA (0x8UL << 28) + #define DBC_DBC_TYPE_CQ_CUTOFF_ACK (0x9UL << 28) + #define DBC_DBC_TYPE_NQ (0xaUL << 28) + #define DBC_DBC_TYPE_NQ_ARM (0xbUL << 28) + #define DBC_DBC_TYPE_NULL (0xfUL << 28) + #define DBC_DBC_TYPE_LAST DBC_DBC_TYPE_NULL +}; + +/* dbc_dbc32 (size:32b/4B) */ +struct dbc_dbc32 { + __le32 type_abs_incr_xid; + #define DBC_DBC32_XID_MASK 0xfffffUL + #define DBC_DBC32_XID_SFT 0 + #define DBC_DBC32_PATH_MASK 0xc00000UL + #define DBC_DBC32_PATH_SFT 22 + #define DBC_DBC32_PATH_ROCE (0x0UL << 22) + #define DBC_DBC32_PATH_L2 (0x1UL << 22) + #define DBC_DBC32_PATH_LAST DBC_DBC32_PATH_L2 + #define DBC_DBC32_INCR_MASK 0xf000000UL + #define DBC_DBC32_INCR_SFT 24 + #define DBC_DBC32_ABS 0x10000000UL + #define DBC_DBC32_TYPE_MASK 0xe0000000UL + #define DBC_DBC32_TYPE_SFT 29 + #define DBC_DBC32_TYPE_SQ (0x0UL << 29) + #define DBC_DBC32_TYPE_LAST DBC_DBC32_TYPE_SQ }; /* SQ WQE Structures */ @@ -2719,6 +2729,8 @@ struct creq_query_func_resp_sb { __le16 max_srq; __le32 max_gid; __le32 tqm_alloc_reqs[12]; + __le32 max_dpi; + __le32 reserved_32; }; /* Set resources command response (16 bytes) */

[2/7] RDMA/bnxt_re: Add 64bit doorbells for 57500 series

Commit Message

Comments

Patch