Message ID | 1547663874-29411-10-git-send-email-fabrizio.castro@bp.renesas.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | Add basic EK874 support | expand |
On Wed, Jan 16, 2019 at 06:37:52PM +0000, Fabrizio Castro wrote: > According to the latest information, the clock options for CAN on RZ/G2 > are the same as the ones available on R-Car Gen3 I'm taking your word for the above. As the patch matches the description: Reviewed-by: Simon Horman <horms+renesas@verge.net.au> > Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support") > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> > --- > Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt > index 7fcf501..b463e12 100644 > --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt > +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt > @@ -28,13 +28,8 @@ Required properties: > > - reg: physical base address and size of the R-Car CAN register map. > - interrupts: interrupt specifier for the sole interrupt. > -- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2 > - devices. > - phandles and clock specifiers for 3 CAN clock inputs for every other > - SoC. > -- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk". > - 3 clock input name strings for every other SoC: "clkp1", "clkp2", > - "can_clk". > +- clocks: phandles and clock specifiers for 3 CAN clock inputs. > +- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk". > - pinctrl-0: pin control group to be used for this controller. > - pinctrl-names: must be "default". > > @@ -50,8 +45,7 @@ using the below properties: > Optional properties: > - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: > <0x0> (default) : Peripheral clock (clkp1) > - <0x1> : Peripheral clock (clkp2) (not supported by > - RZ/G2 devices) > + <0x1> : Peripheral clock (clkp2) > <0x3> : External input clock > > Example > -- > 2.7.4 >
On Wed, 16 Jan 2019 18:37:52 +0000, Fabrizio Castro wrote: > According to the latest information, the clock options for CAN on RZ/G2 > are the same as the ones available on R-Car Gen3 > > Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support") > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> > --- > Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
Hello Marc, I am sorry to bother you. Do you think you can take this patch? Thanks, Fab > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Sent: 16 January 2019 18:38 > Subject: [PATCH 09/11] dt-bindings: can: rcar_can: Fix RZ/G2 CAN clocks > > According to the latest information, the clock options for CAN on RZ/G2 > are the same as the ones available on R-Car Gen3 > > Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support") > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> > --- > Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt > index 7fcf501..b463e12 100644 > --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt > +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt > @@ -28,13 +28,8 @@ Required properties: > > - reg: physical base address and size of the R-Car CAN register map. > - interrupts: interrupt specifier for the sole interrupt. > -- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2 > - devices. > - phandles and clock specifiers for 3 CAN clock inputs for every other > - SoC. > -- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk". > - 3 clock input name strings for every other SoC: "clkp1", "clkp2", > - "can_clk". > +- clocks: phandles and clock specifiers for 3 CAN clock inputs. > +- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk". > - pinctrl-0: pin control group to be used for this controller. > - pinctrl-names: must be "default". > > @@ -50,8 +45,7 @@ using the below properties: > Optional properties: > - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: > <0x0> (default) : Peripheral clock (clkp1) > - <0x1> : Peripheral clock (clkp2) (not supported by > - RZ/G2 devices) > + <0x1> : Peripheral clock (clkp2) > <0x3> : External input clock > > Example > -- > 2.7.4
diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index 7fcf501..b463e12 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -28,13 +28,8 @@ Required properties: - reg: physical base address and size of the R-Car CAN register map. - interrupts: interrupt specifier for the sole interrupt. -- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2 - devices. - phandles and clock specifiers for 3 CAN clock inputs for every other - SoC. -- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk". - 3 clock input name strings for every other SoC: "clkp1", "clkp2", - "can_clk". +- clocks: phandles and clock specifiers for 3 CAN clock inputs. +- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk". - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". @@ -50,8 +45,7 @@ using the below properties: Optional properties: - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: <0x0> (default) : Peripheral clock (clkp1) - <0x1> : Peripheral clock (clkp2) (not supported by - RZ/G2 devices) + <0x1> : Peripheral clock (clkp2) <0x3> : External input clock Example