Message ID | 1547790855-22120-3-git-send-email-masonccyang@mxic.com.tw (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | spi: Add Renesas R-Car Gen3 RPC-IF SPI driver | expand |
On 1/18/19 6:54 AM, Mason Yang wrote: > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > > diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > new file mode 100644 > index 0000000..9b5001e > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,37 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +---------------------------------------------------------- > + > +Required properties: > +- compatible: should be "renesas,rcar-gen3-rpc" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain three register areas: > + first for the base address of rpc-if registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clock-names: should contain "rpc" > +- clocks: should contain 1 entries for the module's clock > + > +Example: > + > + rpc: rpc@ee200000 { > + compatible = "renesas,rcar-gen3-rpc"; > + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, 0x7fff should be 0x8000 , right ? > + <0 0xee208000 0 0x100>; Isn't the write buffer part of the RPC-IF register set ? > + reg-names = "regs", "dirmap", "<wbuf>; > + clocks = <&cpg CPG_MOD 917>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 917>; > + clock-names = "rpc"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; > + }; > + }; >
On 1/18/19 8:41 AM, masonccyang@mxic.com.tw wrote: > Hi Marek, Hi, >> "Marek Vasut" <marek.vasut@gmail.com> >> 2019/01/18 下午 03:10 >> >> > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings >> > +---------------------------------------------------------- >> > + >> > +Required properties: >> > +- compatible: should be "renesas,rcar-gen3-rpc" >> > +- #address-cells: should be 1 >> > +- #size-cells: should be 0 >> > +- reg: should contain three register areas: >> > + first for the base address of rpc-if registers, >> > + second for the direct mapping read mode and >> > + third for the write buffer area. >> > +- reg-names: should contain "regs", "dirmap" and "wbuf" >> > +- clock-names: should contain "rpc" >> > +- clocks: should contain 1 entries for the module's clock >> > + >> > +Example: >> > + >> > + rpc: rpc@ee200000 { >> > + compatible = "renesas,rcar-gen3-rpc"; >> > + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, >> >> 0x7fff should be 0x8000 , right ? > > RPC write buffer starts at 0xee208000 w/ 256 bytes size. The size of the RPC-IF block is 0x8000 though, is it not ? >> > + <0 0xee208000 0 0x100>; >> >> Isn't the write buffer part of the RPC-IF register set ? > > yep, but by Sergei and Geert's comments, we use a separate reg entry > for this write buffer. > ---- copy the replied email from Geert --------------------------------- >> Maybe Geert or Marek could comment on it, thanks. > > Given the writer buffer is separate from the other registers (it's in > a different > 4 KiB page, and thus may be at a different offset on future SoCs), and not > present on RZ/A1, I think it's a good idea to use a separate reg entry > for it. > ----------------------------------------------------------------------- +CC Chris, the RZ/A1 has no write buffer for the RPC ?
Hi Mason, On Fri, Jan 18, 2019 at 6:55 AM Mason Yang <masonccyang@mxic.com.tw> wrote: > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Thanks for the update! > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,37 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +---------------------------------------------------------- > + > +Required properties: > +- compatible: should be compatible: should be an SoC-specific compatible value, followed by "renesas,rcar-gen3-rpc" as a fallback. Examples of the latter are: - "renesas,r8a7795-rpc" (R-Car H3). This makes it future-proof, in case the RPC on a specific SoC version needs to be handled specially. We already know that is the case for R-Car V3M. > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain three register areas: > + first for the base address of rpc-if registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clock-names: should contain "rpc" > +- clocks: should contain 1 entries for the module's clock > + > +Example: > + > + rpc: rpc@ee200000 { > + compatible = "renesas,rcar-gen3-rpc"; compatible = "renesas,r8a7795-rpc," renesas,rcar-gen3-rpc"; > + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, > + <0 0xee208000 0 0x100>; > + reg-names = "regs", "dirmap", "<wbuf>; > + clocks = <&cpg CPG_MOD 917>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 917>; > + clock-names = "rpc"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; > + }; > + }; Gr{oetje,eeting}s, Geert
On 1/18/19 9:03 AM, Geert Uytterhoeven wrote: > Hi Mason, > > On Fri, Jan 18, 2019 at 6:55 AM Mason Yang <masonccyang@mxic.com.tw> wrote: >> Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. >> >> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> > > Thanks for the update! > >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt >> @@ -0,0 +1,37 @@ >> +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings >> +---------------------------------------------------------- >> + >> +Required properties: >> +- compatible: should be > > compatible: should be an SoC-specific compatible value, followed by > "renesas,rcar-gen3-rpc" as a fallback. > > Examples of the latter are: > - "renesas,r8a7795-rpc" (R-Car H3). > > This makes it future-proof, in case the RPC on a specific SoC version needs > to be handled specially. We already know that is the case for R-Car V3M. > >> +- #address-cells: should be 1 >> +- #size-cells: should be 0 >> +- reg: should contain three register areas: >> + first for the base address of rpc-if registers, >> + second for the direct mapping read mode and >> + third for the write buffer area. >> +- reg-names: should contain "regs", "dirmap" and "wbuf" >> +- clock-names: should contain "rpc" >> +- clocks: should contain 1 entries for the module's clock >> + >> +Example: >> + >> + rpc: rpc@ee200000 { >> + compatible = "renesas,rcar-gen3-rpc"; > > compatible = "renesas,r8a7795-rpc," renesas,rcar-gen3-rpc"; Without the extra comma after r8a7795-rpc, of course ;-)
Hi Marek, On Fri, Jan 18, 2019 at 9:08 AM Marek Vasut <marek.vasut@gmail.com> wrote: > On 1/18/19 9:03 AM, Geert Uytterhoeven wrote: > > On Fri, Jan 18, 2019 at 6:55 AM Mason Yang <masonccyang@mxic.com.tw> wrote: > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > >> +Example: > >> + > >> + rpc: rpc@ee200000 { > >> + compatible = "renesas,rcar-gen3-rpc"; > > > > compatible = "renesas,r8a7795-rpc," renesas,rcar-gen3-rpc"; > > Without the extra comma after r8a7795-rpc, of course ;-) Let's move it after the closing double quotes. Would that be OK for you? ^-) Gr{oetje,eeting}s, Geert
On 1/18/19 9:10 AM, Geert Uytterhoeven wrote: > Hi Marek, > > On Fri, Jan 18, 2019 at 9:08 AM Marek Vasut <marek.vasut@gmail.com> wrote: >> On 1/18/19 9:03 AM, Geert Uytterhoeven wrote: >>> On Fri, Jan 18, 2019 at 6:55 AM Mason Yang <masonccyang@mxic.com.tw> wrote: >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > >>>> +Example: >>>> + >>>> + rpc: rpc@ee200000 { >>>> + compatible = "renesas,rcar-gen3-rpc"; >>> >>> compatible = "renesas,r8a7795-rpc," renesas,rcar-gen3-rpc"; >> >> Without the extra comma after r8a7795-rpc, of course ;-) > > Let's move it after the closing double quotes. Would that be OK for you? ^-) Ack
Hello! On 18.01.2019 8:54, Mason Yang wrote: > Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > > diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > new file mode 100644 > index 0000000..9b5001e > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,37 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +---------------------------------------------------------- > + > +Required properties: > +- compatible: should be "renesas,rcar-gen3-rpc" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain three register areas: > + first for the base address of rpc-if registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clock-names: should contain "rpc" > +- clocks: should contain 1 entries for the module's clock > + > +Example: > + > + rpc: rpc@ee200000 { > + compatible = "renesas,rcar-gen3-rpc"; > + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, s/0x7fff/0x8000/. -- that's size, not limit. But in reality, 0x200 would be enough. > + <0 0xee208000 0 0x100>; > + reg-names = "regs", "dirmap", "<wbuf>; Why <>? MBR, Sergei
Hello! On 18.01.2019 9:16, Marek Vasut wrote: >> Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. >> >> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> >> --- >> .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++ >> 1 file changed, 37 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt >> >> diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt >> new file mode 100644 >> index 0000000..9b5001e >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt >> @@ -0,0 +1,37 @@ >> +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings >> +---------------------------------------------------------- >> + >> +Required properties: >> +- compatible: should be "renesas,rcar-gen3-rpc" >> +- #address-cells: should be 1 >> +- #size-cells: should be 0 >> +- reg: should contain three register areas: >> + first for the base address of rpc-if registers, >> + second for the direct mapping read mode and >> + third for the write buffer area. >> +- reg-names: should contain "regs", "dirmap" and "wbuf" >> +- clock-names: should contain "rpc" >> +- clocks: should contain 1 entries for the module's clock >> + >> +Example: >> + >> + rpc: rpc@ee200000 { >> + compatible = "renesas,rcar-gen3-rpc"; >> + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, > > 0x7fff should be 0x8000 , right ? Even 0x200. > >> + <0 0xee208000 0 0x100>; > > Isn't the write buffer part of the RPC-IF register set ? No, if you look into the manual. MBR, Sergei
Hi Mason, On Fri, Jan 18, 2019 at 10:28 AM <masonccyang@mxic.com.tw> wrote: > I modified this dts to: > > Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > -------------------------------------------------------------------- > > Required properties: > - compatible: should be an SoC-specific compatible value, followed by > "renesas,rcar-gen3-rpc" as a fallback. Please list the supported SoC-specific compatible values, so scripts/checkpatch.pl can validate patches adding RPC device nodes to DTS files. > - #address-cells: should be 1 > - #size-cells: should be 0 > - reg: should contain three register areas: > first for the base address of rpc-if registers, > second for the direct mapping read mode and > third for the write buffer area. > - reg-names: should contain "regs", "dirmap" and "wbuf" > - clock-names: should contain "rpc" > - clocks: should contain 1 entries for the module's clock Please revert the order of clocks and clock-names, cfr. reg and reg-names. > Example: > > rpc: rpc@ee200000 { > compatible = "renesas,r8a7795-rpc", "renesas,rcar-gen3-rpc"; > reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, > <0 0xee208000 0 0x100>; > reg-names = "regs", "dirmap", "wbuf"; > clocks = <&cpg CPG_MOD 917>; > power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > resets = <&cpg 917>; > clock-names = "rpc"; Please move clock-names just below clocks. > #address-cells = <1>; > #size-cells = <0>; > > flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > spi-max-frequency = <40000000>; > spi-tx-bus-width = <1>; > spi-rx-bus-width = <1>; > }; > }; > > > If it is ok and I will submit it in [PATCH v7 2/2]. Looks good, with the above changes made. Thanks! Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 0000000..9b5001e --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,37 @@ +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings +---------------------------------------------------------- + +Required properties: +- compatible: should be "renesas,rcar-gen3-rpc" +- #address-cells: should be 1 +- #size-cells: should be 0 +- reg: should contain three register areas: + first for the base address of rpc-if registers, + second for the direct mapping read mode and + third for the write buffer area. +- reg-names: should contain "regs", "dirmap" and "wbuf" +- clock-names: should contain "rpc" +- clocks: should contain 1 entries for the module's clock + +Example: + + rpc: rpc@ee200000 { + compatible = "renesas,rcar-gen3-rpc"; + reg = <0 0xee200000 0 0x7fff>, <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "<wbuf>; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + clock-names = "rpc"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };
Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> --- .../devicetree/bindings/spi/spi-renesas-rpc.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt