diff mbox series

[2/6] MIPS: Loongson32: workaround di issue

Message ID 20190122130415.3440-2-jiaxun.yang@flygoat.com (mailing list archive)
State Accepted
Headers show
Series [1/6] MIPS: Loongson32: Remove unused platform devices | expand

Commit Message

Jiaxun Yang Jan. 22, 2019, 1:04 p.m. UTC
GS232 core used in Loongson-1 processors has a bug that
di instruction doesn't save the irqflag immediately.

Workaround by set irqflag in CP0 before di instructions
as same as Loongson-3.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/include/asm/irqflags.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Paul Burton Jan. 22, 2019, 5:39 p.m. UTC | #1
Hi Jiaxun,

On Tue, Jan 22, 2019 at 09:04:11PM +0800, Jiaxun Yang wrote:
> GS232 core used in Loongson-1 processors has a bug that
> di instruction doesn't save the irqflag immediately.
> 
> Workaround by set irqflag in CP0 before di instructions
> as same as Loongson-3.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>  arch/mips/include/asm/irqflags.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
> index 9d3610be2323..59549d972439 100644
> --- a/arch/mips/include/asm/irqflags.h
> +++ b/arch/mips/include/asm/irqflags.h
> @@ -41,7 +41,7 @@ static inline unsigned long arch_local_irq_save(void)
>  	"	.set	push						\n"
>  	"	.set	reorder						\n"
>  	"	.set	noat						\n"
> -#if defined(CONFIG_CPU_LOONGSON3)
> +#if defined(CONFIG_CPU_LOONGSON3) || defined (CONFIG_CPU_LOONGSON1)
>  	"	mfc0	%[flags], $12					\n"
>  	"	di							\n"
>  #else
> -- 
> 2.20.1

Thanks for your patches.

Since this bug exists on both Loongson 1 CPUs & Loongson 3 CPUs, I'm
wondering whether it also exists on Loongson 2 CPUs. Do you happen to
know whether that is the case?

Thanks,
    Paul
Jiaxun Yang Jan. 23, 2019, 12:19 a.m. UTC | #2
On January 23, 2019 1:39:36 AM GMT+08:00, Paul Burton <paul.burton@mips.com> wrote:
>Hi Jiaxun,
>
>
>
>Thanks for your patches.
>
>Since this bug exists on both Loongson 1 CPUs & Loongson 3 CPUs, I'm
>wondering whether it also exists on Loongson 2 CPUs. Do you happen to
>know whether that is the case?

Early Loongson-2 such as Loongson-2E/F/G/H does not have di/ei instructions, they are not R2 compatible.

The latest Loongson-2K1000 have the same di/ei bug but it hasn't been submitted to the mainline.

Thanks


>
>Thanks,
>    Paul
Paul Burton Jan. 23, 2019, 1:34 a.m. UTC | #3
Hello,

Jiaxun Yang wrote:
> GS232 core used in Loongson-1 processors has a bug that
> di instruction doesn't save the irqflag immediately.
> 
> Workaround by set irqflag in CP0 before di instructions
> as same as Loongson-3.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Applied to mips-next.

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]
diff mbox series

Patch

diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 9d3610be2323..59549d972439 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -41,7 +41,7 @@  static inline unsigned long arch_local_irq_save(void)
 	"	.set	push						\n"
 	"	.set	reorder						\n"
 	"	.set	noat						\n"
-#if defined(CONFIG_CPU_LOONGSON3)
+#if defined(CONFIG_CPU_LOONGSON3) || defined (CONFIG_CPU_LOONGSON1)
 	"	mfc0	%[flags], $12					\n"
 	"	di							\n"
 #else