| Message ID | 20190128204306.95076-1-sean@poorly.run (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [1/4] drm/msm: Use drm_mode_vrefresh instead of mode->vrefresh | expand |
On 2019-01-28 12:42, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Use the drm_mode_vrefresh helper where we need refresh rate in case > vrefresh is empty. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 +++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- > drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 4 ++-- > 4 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 941ac25d2a023..dd71cb6ba4f5c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -522,8 +522,8 @@ static void _dpu_encoder_adjust_mode(struct > drm_connector *connector, > > list_for_each_entry(cur_mode, &connector->modes, head) { > if (cur_mode->vdisplay == adj_mode->vdisplay && > - cur_mode->hdisplay == adj_mode->hdisplay && > - cur_mode->vrefresh == adj_mode->vrefresh) { > + cur_mode->hdisplay == adj_mode->hdisplay && > + drm_mode_vrefresh(cur_mode) == drm_mode_vrefresh(adj_mode)) { > adj_mode->private = cur_mode->private; > adj_mode->private_flags |= cur_mode->private_flags; > } > @@ -1805,7 +1805,7 @@ void dpu_encoder_kickoff(struct drm_encoder > *drm_enc, bool async) > > atomic_set(&dpu_enc->frame_done_timeout, > DPU_FRAME_DONE_TIMEOUT * 1000 / > - drm_enc->crtc->state->adjusted_mode.vrefresh); > + drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode)); > mod_timer(&dpu_enc->frame_done_timer, jiffies + > ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000)); > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > index 99ab5ca9bed3b..f21163313d635 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > @@ -404,7 +404,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > return; > } > > - tc_cfg.vsync_count = vsync_hz / (mode->vtotal * mode->vrefresh); > + tc_cfg.vsync_count = vsync_hz / > + (mode->vtotal * drm_mode_vrefresh(mode)); > > /* enable external TE after kickoff to avoid premature autorefresh */ > tc_cfg.hw_vsync_mode = 0; > @@ -424,7 +425,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, vsync_hz, > - mode->vtotal, mode->vrefresh); > + mode->vtotal, drm_mode_vrefresh(mode)); > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d enable %u start_pos %u rd_ptr_irq %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, tc_enable, tc_cfg.start_pos, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index b01183b309b9e..da1f727d74957 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -387,7 +387,7 @@ static void _dpu_plane_set_ot_limit(struct > drm_plane *plane, > ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); > ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); > ot_params.is_wfd = !pdpu->is_rt_pipe; > - ot_params.frame_rate = crtc->mode.vrefresh; > + ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); > ot_params.vbif_idx = VBIF_RT; > ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; > ot_params.rd = true; > diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > index c1962f29ec7d6..6341ac010f7de 100644 > --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > @@ -59,10 +59,10 @@ static int pingpong_tearcheck_setup(struct > drm_encoder *encoder, > return -EINVAL; > } > > - total_lines_x100 = mode->vtotal * mode->vrefresh; > + total_lines_x100 = mode->vtotal * drm_mode_vrefresh(mode); > if (!total_lines_x100) { > DRM_DEV_ERROR(dev, "%s: vtotal(%d) or vrefresh(%d) is 0\n", > - __func__, mode->vtotal, mode->vrefresh); > + __func__, mode->vtotal, drm_mode_vrefresh(mode)); > return -EINVAL; > }
On Mon, Jan 28, 2019 at 03:42:48PM -0500, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Use the drm_mode_vrefresh helper where we need refresh rate in case > vrefresh is empty. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> I think adding a todo to remove these fields and switch everone over to the helpers would be useful. Recomputing is not going to hurt us I think in modeset code (the one case where we do care is vblank constants, and those are somewhere else), and would avoid all these bugs ... -Daniel > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 +++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- > drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 4 ++-- > 4 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 941ac25d2a023..dd71cb6ba4f5c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -522,8 +522,8 @@ static void _dpu_encoder_adjust_mode(struct drm_connector *connector, > > list_for_each_entry(cur_mode, &connector->modes, head) { > if (cur_mode->vdisplay == adj_mode->vdisplay && > - cur_mode->hdisplay == adj_mode->hdisplay && > - cur_mode->vrefresh == adj_mode->vrefresh) { > + cur_mode->hdisplay == adj_mode->hdisplay && > + drm_mode_vrefresh(cur_mode) == drm_mode_vrefresh(adj_mode)) { > adj_mode->private = cur_mode->private; > adj_mode->private_flags |= cur_mode->private_flags; > } > @@ -1805,7 +1805,7 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, bool async) > > atomic_set(&dpu_enc->frame_done_timeout, > DPU_FRAME_DONE_TIMEOUT * 1000 / > - drm_enc->crtc->state->adjusted_mode.vrefresh); > + drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode)); > mod_timer(&dpu_enc->frame_done_timer, jiffies + > ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000)); > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > index 99ab5ca9bed3b..f21163313d635 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > @@ -404,7 +404,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > return; > } > > - tc_cfg.vsync_count = vsync_hz / (mode->vtotal * mode->vrefresh); > + tc_cfg.vsync_count = vsync_hz / > + (mode->vtotal * drm_mode_vrefresh(mode)); > > /* enable external TE after kickoff to avoid premature autorefresh */ > tc_cfg.hw_vsync_mode = 0; > @@ -424,7 +425,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, vsync_hz, > - mode->vtotal, mode->vrefresh); > + mode->vtotal, drm_mode_vrefresh(mode)); > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d enable %u start_pos %u rd_ptr_irq %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, tc_enable, tc_cfg.start_pos, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index b01183b309b9e..da1f727d74957 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -387,7 +387,7 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane, > ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); > ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); > ot_params.is_wfd = !pdpu->is_rt_pipe; > - ot_params.frame_rate = crtc->mode.vrefresh; > + ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); > ot_params.vbif_idx = VBIF_RT; > ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; > ot_params.rd = true; > diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > index c1962f29ec7d6..6341ac010f7de 100644 > --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > @@ -59,10 +59,10 @@ static int pingpong_tearcheck_setup(struct drm_encoder *encoder, > return -EINVAL; > } > > - total_lines_x100 = mode->vtotal * mode->vrefresh; > + total_lines_x100 = mode->vtotal * drm_mode_vrefresh(mode); > if (!total_lines_x100) { > DRM_DEV_ERROR(dev, "%s: vtotal(%d) or vrefresh(%d) is 0\n", > - __func__, mode->vtotal, mode->vrefresh); > + __func__, mode->vtotal, drm_mode_vrefresh(mode)); > return -EINVAL; > } > > -- > Sean Paul, Software Engineer, Google / Chromium OS > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Tue, Jan 29, 2019 at 09:59:40AM +0100, Daniel Vetter wrote: > On Mon, Jan 28, 2019 at 03:42:48PM -0500, Sean Paul wrote: > > From: Sean Paul <seanpaul@chromium.org> > > > > Use the drm_mode_vrefresh helper where we need refresh rate in case > > vrefresh is empty. > > > > Signed-off-by: Sean Paul <seanpaul@chromium.org> > > I think adding a todo to remove these fields and switch everone over to > the helpers would be useful. Recomputing is not going to hurt us I think > in modeset code (the one case where we do care is vblank constants, and > those are somewhere else), and would avoid all these bugs ... Yeah, and to boot if vrefresh is populated, the function just returns it, so it's quite safe (unless someone is relying on vrefresh == 0 as valid data, which would be nice to weed out anyways). I'll spin up a TODO patch, good suggestion. Sean > -Daniel > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 +++-- > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- > > drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 4 ++-- > > 4 files changed, 9 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > index 941ac25d2a023..dd71cb6ba4f5c 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > > @@ -522,8 +522,8 @@ static void _dpu_encoder_adjust_mode(struct drm_connector *connector, > > > > list_for_each_entry(cur_mode, &connector->modes, head) { > > if (cur_mode->vdisplay == adj_mode->vdisplay && > > - cur_mode->hdisplay == adj_mode->hdisplay && > > - cur_mode->vrefresh == adj_mode->vrefresh) { > > + cur_mode->hdisplay == adj_mode->hdisplay && > > + drm_mode_vrefresh(cur_mode) == drm_mode_vrefresh(adj_mode)) { > > adj_mode->private = cur_mode->private; > > adj_mode->private_flags |= cur_mode->private_flags; > > } > > @@ -1805,7 +1805,7 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, bool async) > > > > atomic_set(&dpu_enc->frame_done_timeout, > > DPU_FRAME_DONE_TIMEOUT * 1000 / > > - drm_enc->crtc->state->adjusted_mode.vrefresh); > > + drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode)); > > mod_timer(&dpu_enc->frame_done_timer, jiffies + > > ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000)); > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > index 99ab5ca9bed3b..f21163313d635 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > @@ -404,7 +404,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > > return; > > } > > > > - tc_cfg.vsync_count = vsync_hz / (mode->vtotal * mode->vrefresh); > > + tc_cfg.vsync_count = vsync_hz / > > + (mode->vtotal * drm_mode_vrefresh(mode)); > > > > /* enable external TE after kickoff to avoid premature autorefresh */ > > tc_cfg.hw_vsync_mode = 0; > > @@ -424,7 +425,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > > DPU_DEBUG_CMDENC(cmd_enc, > > "tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u\n", > > phys_enc->hw_pp->idx - PINGPONG_0, vsync_hz, > > - mode->vtotal, mode->vrefresh); > > + mode->vtotal, drm_mode_vrefresh(mode)); > > DPU_DEBUG_CMDENC(cmd_enc, > > "tc %d enable %u start_pos %u rd_ptr_irq %u\n", > > phys_enc->hw_pp->idx - PINGPONG_0, tc_enable, tc_cfg.start_pos, > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > index b01183b309b9e..da1f727d74957 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > > @@ -387,7 +387,7 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane, > > ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); > > ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); > > ot_params.is_wfd = !pdpu->is_rt_pipe; > > - ot_params.frame_rate = crtc->mode.vrefresh; > > + ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); > > ot_params.vbif_idx = VBIF_RT; > > ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; > > ot_params.rd = true; > > diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > > index c1962f29ec7d6..6341ac010f7de 100644 > > --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > > +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > > @@ -59,10 +59,10 @@ static int pingpong_tearcheck_setup(struct drm_encoder *encoder, > > return -EINVAL; > > } > > > > - total_lines_x100 = mode->vtotal * mode->vrefresh; > > + total_lines_x100 = mode->vtotal * drm_mode_vrefresh(mode); > > if (!total_lines_x100) { > > DRM_DEV_ERROR(dev, "%s: vtotal(%d) or vrefresh(%d) is 0\n", > > - __func__, mode->vtotal, mode->vrefresh); > > + __func__, mode->vtotal, drm_mode_vrefresh(mode)); > > return -EINVAL; > > } > > > > -- > > Sean Paul, Software Engineer, Google / Chromium OS > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch
On 2019-01-28 12:42, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Use the drm_mode_vrefresh helper where we need refresh rate in case > vrefresh is empty. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 +++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- > drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 4 ++-- > 4 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 941ac25d2a023..dd71cb6ba4f5c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -522,8 +522,8 @@ static void _dpu_encoder_adjust_mode(struct > drm_connector *connector, > > list_for_each_entry(cur_mode, &connector->modes, head) { > if (cur_mode->vdisplay == adj_mode->vdisplay && > - cur_mode->hdisplay == adj_mode->hdisplay && > - cur_mode->vrefresh == adj_mode->vrefresh) { > + cur_mode->hdisplay == adj_mode->hdisplay && > + drm_mode_vrefresh(cur_mode) == drm_mode_vrefresh(adj_mode)) { > adj_mode->private = cur_mode->private; > adj_mode->private_flags |= cur_mode->private_flags; > } > @@ -1805,7 +1805,7 @@ void dpu_encoder_kickoff(struct drm_encoder > *drm_enc, > bool async) > > atomic_set(&dpu_enc->frame_done_timeout, > DPU_FRAME_DONE_TIMEOUT * 1000 / > - drm_enc->crtc->state->adjusted_mode.vrefresh); > + drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode)); > mod_timer(&dpu_enc->frame_done_timer, jiffies + > ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000)); > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > index 99ab5ca9bed3b..f21163313d635 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > @@ -404,7 +404,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > return; > } > > - tc_cfg.vsync_count = vsync_hz / (mode->vtotal * mode->vrefresh); > + tc_cfg.vsync_count = vsync_hz / > + (mode->vtotal * drm_mode_vrefresh(mode)); > > /* enable external TE after kickoff to avoid premature autorefresh */ > tc_cfg.hw_vsync_mode = 0; > @@ -424,7 +425,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, vsync_hz, > - mode->vtotal, mode->vrefresh); > + mode->vtotal, drm_mode_vrefresh(mode)); > DPU_DEBUG_CMDENC(cmd_enc, > "tc %d enable %u start_pos %u rd_ptr_irq %u\n", > phys_enc->hw_pp->idx - PINGPONG_0, tc_enable, tc_cfg.start_pos, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index b01183b309b9e..da1f727d74957 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -387,7 +387,7 @@ static void _dpu_plane_set_ot_limit(struct > drm_plane > *plane, > ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); > ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); > ot_params.is_wfd = !pdpu->is_rt_pipe; > - ot_params.frame_rate = crtc->mode.vrefresh; > + ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); > ot_params.vbif_idx = VBIF_RT; > ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; > ot_params.rd = true; > diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > index c1962f29ec7d6..6341ac010f7de 100644 > --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c > @@ -59,10 +59,10 @@ static int pingpong_tearcheck_setup(struct > drm_encoder > *encoder, > return -EINVAL; > } > > - total_lines_x100 = mode->vtotal * mode->vrefresh; > + total_lines_x100 = mode->vtotal * drm_mode_vrefresh(mode); > if (!total_lines_x100) { > DRM_DEV_ERROR(dev, "%s: vtotal(%d) or vrefresh(%d) is 0\n", > - __func__, mode->vtotal, mode->vrefresh); > + __func__, mode->vtotal, drm_mode_vrefresh(mode)); > return -EINVAL; > }
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 941ac25d2a023..dd71cb6ba4f5c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -522,8 +522,8 @@ static void _dpu_encoder_adjust_mode(struct drm_connector *connector, list_for_each_entry(cur_mode, &connector->modes, head) { if (cur_mode->vdisplay == adj_mode->vdisplay && - cur_mode->hdisplay == adj_mode->hdisplay && - cur_mode->vrefresh == adj_mode->vrefresh) { + cur_mode->hdisplay == adj_mode->hdisplay && + drm_mode_vrefresh(cur_mode) == drm_mode_vrefresh(adj_mode)) { adj_mode->private = cur_mode->private; adj_mode->private_flags |= cur_mode->private_flags; } @@ -1805,7 +1805,7 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc, bool async) atomic_set(&dpu_enc->frame_done_timeout, DPU_FRAME_DONE_TIMEOUT * 1000 / - drm_enc->crtc->state->adjusted_mode.vrefresh); + drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode)); mod_timer(&dpu_enc->frame_done_timer, jiffies + ((atomic_read(&dpu_enc->frame_done_timeout) * HZ) / 1000)); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 99ab5ca9bed3b..f21163313d635 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -404,7 +404,8 @@ static void dpu_encoder_phys_cmd_tearcheck_config( return; } - tc_cfg.vsync_count = vsync_hz / (mode->vtotal * mode->vrefresh); + tc_cfg.vsync_count = vsync_hz / + (mode->vtotal * drm_mode_vrefresh(mode)); /* enable external TE after kickoff to avoid premature autorefresh */ tc_cfg.hw_vsync_mode = 0; @@ -424,7 +425,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( DPU_DEBUG_CMDENC(cmd_enc, "tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u\n", phys_enc->hw_pp->idx - PINGPONG_0, vsync_hz, - mode->vtotal, mode->vrefresh); + mode->vtotal, drm_mode_vrefresh(mode)); DPU_DEBUG_CMDENC(cmd_enc, "tc %d enable %u start_pos %u rd_ptr_irq %u\n", phys_enc->hw_pp->idx - PINGPONG_0, tc_enable, tc_cfg.start_pos, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index b01183b309b9e..da1f727d74957 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -387,7 +387,7 @@ static void _dpu_plane_set_ot_limit(struct drm_plane *plane, ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); ot_params.is_wfd = !pdpu->is_rt_pipe; - ot_params.frame_rate = crtc->mode.vrefresh; + ot_params.frame_rate = drm_mode_vrefresh(&crtc->mode); ot_params.vbif_idx = VBIF_RT; ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; ot_params.rd = true; diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c index c1962f29ec7d6..6341ac010f7de 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c @@ -59,10 +59,10 @@ static int pingpong_tearcheck_setup(struct drm_encoder *encoder, return -EINVAL; } - total_lines_x100 = mode->vtotal * mode->vrefresh; + total_lines_x100 = mode->vtotal * drm_mode_vrefresh(mode); if (!total_lines_x100) { DRM_DEV_ERROR(dev, "%s: vtotal(%d) or vrefresh(%d) is 0\n", - __func__, mode->vtotal, mode->vrefresh); + __func__, mode->vtotal, drm_mode_vrefresh(mode)); return -EINVAL; }