| Message ID | 20190130091953.20131-1-ccaione@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: imx8mq: Add QuadSPI controller | expand |
Hi Carlo, On Wed, Jan 30, 2019 at 7:19 AM Carlo Caione <ccaione@baylibre.com> wrote: > > Add a node for the Freescale/NXP QuadSPI controller with a proper > pinctrl set and enable it for the i.MX8MQ EVK board. > Extend also the AIPS3 memory range to accommodate the QuadSPI-memory > region. > > Signed-off-by: Carlo Caione <ccaione@baylibre.com> > --- > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 27 ++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 +++++++++++- Please split this in two patches: one for the imx8mq.dtsi and other for the board dts. > +&spi0 { I have recently sent a patch adding eCSPI support. Please call this qspi0 to avoid confusion with the eCSPI name instances. > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_qspi>; > + status = "okay"; > + > + flash0: n25q256a@0 { Node names should be generic and label names specific, so: n25q256a: flash@0 > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "micron,n25q256a", "jedec,spi-nor"; > + spi-max-frequency = <29000000>; > + spi-nor,ddr-quad-read-dummy = <6>; This property does not exist in mainline. > > + spi0: spi@30bb0000 { qspi0: spi@30bb0000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx8mq-qspi", "fsl,imx7d-qspi"; Please send a separate patch documenting fsl,imx8mq-qspi
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index f74b13aa5aa5..ae181c2a5003 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -137,6 +137,21 @@ status = "okay"; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash0: n25q256a@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,n25q256a", "jedec,spi-nor"; + spi-max-frequency = <29000000>; + spi-nor,ddr-quad-read-dummy = <6>; + }; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; @@ -195,6 +210,18 @@ >; }; + pinctrl_qspi: qspigrp { + fsl,pins = < + MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82 + MX8MQ_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MQ_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MQ_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MQ_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MQ_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + + >; + }; + pinctrl_reg_usdhc2: regusdhc2grpgpio { fsl,pins = < MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index dbedc4a5e7fb..c20f43f63c4e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -379,7 +379,8 @@ compatible = "fsl,imx8mq-aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x30800000 0x30800000 0x400000>; + ranges = <0x30800000 0x30800000 0x400000>, + <0x08000000 0x08000000 0x10000000>; uart1: serial@30860000 { compatible = "fsl,imx8mq-uart", @@ -497,6 +498,19 @@ status = "disabled"; }; + spi0: spi@30bb0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8mq-qspi", "fsl,imx7d-qspi"; + reg = <0x30bb0000 0x10000>, <0x08000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_QSPI_ROOT>, + <&clk IMX8MQ_CLK_QSPI_ROOT>; + clock-names = "qspi_en", "qspi"; + status = "disabled"; + }; + fec1: ethernet@30be0000 { compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec"; reg = <0x30be0000 0x10000>;
Add a node for the Freescale/NXP QuadSPI controller with a proper pinctrl set and enable it for the i.MX8MQ EVK board. Extend also the AIPS3 memory range to accommodate the QuadSPI-memory region. Signed-off-by: Carlo Caione <ccaione@baylibre.com> --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 27 ++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 +++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-)