| Message ID | 20190129080926.36773-7-Zhiqiang.Hou@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs | expand |
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> On Tue, Jan 29, 2019 at 1:39 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > As it won't delete any node in this iteration, replaced > the function resource_list_for_each_entry_safe() with > the resource_list_for_each_entry(). > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> > --- > V3: > - No change > > drivers/pci/controller/pcie-mobiveil.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c > index 8ff873023b5f..b2cc9c097fc9 100644 > --- a/drivers/pci/controller/pcie-mobiveil.c > +++ b/drivers/pci/controller/pcie-mobiveil.c > @@ -569,7 +569,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) > { > u32 value, pab_ctrl, type; > int err; > - struct resource_entry *win, *tmp; > + struct resource_entry *win; > > err = mobiveil_bringup_link(pcie); > if (err) { > @@ -620,7 +620,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) > program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); > > /* Get the I/O and memory ranges from DT */ > - resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { > + resource_list_for_each_entry(win, &pcie->resources) { > if (resource_type(win->res) == IORESOURCE_MEM) > type = MEM_WINDOW_TYPE; > else if (resource_type(win->res) == IORESOURCE_IO) > -- > 2.17.1 >
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 8ff873023b5f..b2cc9c097fc9 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -569,7 +569,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) { u32 value, pab_ctrl, type; int err; - struct resource_entry *win, *tmp; + struct resource_entry *win; err = mobiveil_bringup_link(pcie); if (err) { @@ -620,7 +620,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ - resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { + resource_list_for_each_entry(win, &pcie->resources) { if (resource_type(win->res) == IORESOURCE_MEM) type = MEM_WINDOW_TYPE; else if (resource_type(win->res) == IORESOURCE_IO)