| Message ID | 20190205173254.16388-1-tudor.ambarus@microchip.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | spi: atmel-quadspi: introduce sam9x60 qspi controller | expand |
Hello:
The following patches were marked "accepted", because they were applied to
broonie/spi.git (refs/heads/for-next):
Series: spi: atmel-quadspi: introduce sam9x60 qspi controller
Submitter: Tudor Ambarus <tudor.ambarus@microchip.com>
Patchwork: https://patchwork.kernel.org/project/spi-devel-general/list/?series=76073
Patches: [v6,01/13] spi: atmel-quadspi: cache MR value to avoid a write access
[v6,02/13] spi: atmel-quadspi: order header files inclusion alphabetically
[v6,03/13] spi: atmel-quadspi: drop wrappers for iomem accesses
[v6,04/13] spi: atmel-quadspi: fix naming scheme
[v6,05/13] spi: atmel-quadspi: remove unnecessary cast
[v6,06/13] spi: atmel-quadspi: return appropriate error code
[v6,07/13] spi: atmel-quadspi: switch to SPDX license identifiers
[v6,08/13] spi: atmel-quadspi: rework transfer macros
[v6,09/13] dt-bindings: spi: atmel-quadspi: update example to new clock binding
[v6,10/13] dt-bindings: spi: atmel-quadspi: make "pclk" mandatory
[v6,11/13] spi: atmel-quadspi: add support for named peripheral clock
[v6,12/13] dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60
[v6,13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller
Total patches: 13
From: Tudor Ambarus <tudor.ambarus@microchip.com> Patches from 1 to 11 are minor fixes or cosmetics. Patches 12 and 13 introduce the sam9x60 qspi controller. sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash. Backward compatibility test done on sama5d2 qspi controller and mx25l25635e jedec,spi-nor flash. v6: patch 13/13: add a caps instance to the sama5d2 entry instead of allowing caps to be NULL v5: - use WICR for sam9x60 - remove ops hooks and introduce caps->has_ricr - get rid of the cfg struct - group IO accesses together in atmel_qspi_set_cfg() v4: - s/smm/mr, init controller in serial memory mode by default - drop local variables that kept aq->regs and &pdev->dev, the compiler should be smart enough to store them in a register - introduce QSPI_IFR_TFRTYP_MEM - add comment saying QSPI_IFR_APBTFRTYP_READ is defined in sam9x60 - s/sama5d2_qspi_modes/atmel_qspi_modes, modes are the same both controllers - fix kernel doc header - move comment in function body - collect R-b tags v3: - update smm value when different. - treat just regular spi transfers when introducing sam9x60 qspi IP. Mem transfers will be added together with dirmap support. - reorganize the code and change ops functions pointers to avoid code duplication. - rename aq->clk to aq->pclk to indicate that it's a peripheral clock. - drop unused and NOP transfer macros. - add Suggested-by tags, reword some commits. v2: - cache MR value, - drop iomem wrappers, - make "pclk" clock-name mandatory even for sama5d2, - rework clock handling, - reorder setting of register values in set_cfg() calls, - collect R-b tags. Tudor Ambarus (13): spi: atmel-quadspi: cache MR value to avoid a write access spi: atmel-quadspi: order header files inclusion alphabetically spi: atmel-quadspi: drop wrappers for iomem accesses spi: atmel-quadspi: fix naming scheme spi: atmel-quadspi: remove unnecessary cast spi: atmel-quadspi: return appropriate error code spi: atmel-quadspi: switch to SPDX license identifiers spi: atmel-quadspi: rework transfer macros dt-bindings: spi: atmel-quadspi: update example to new clock binding dt-bindings: spi: atmel-quadspi: make "pclk" mandatory spi: atmel-quadspi: add support for named peripheral clock dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 spi: atmel-quadspi: add support for sam9x60 qspi controller .../devicetree/bindings/spi/atmel-quadspi.txt | 12 +- drivers/spi/atmel-quadspi.c | 270 +++++++++++++-------- 2 files changed, 184 insertions(+), 98 deletions(-)