[v7,00/35] target/riscv: Convert to decodetree

Message ID	20190213155414.22285-1-palmer@sifive.com (mailing list archive)
Headers	show Return-Path: <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org> Date: Wed, 13 Feb 2019 07:53:39 -0800 Message-Id: <20190213155414.22285-1-palmer@sifive.com> From: Palmer Dabbelt <palmer@sifive.com> To: qemu-riscv@nongnu.org Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree Precedence: list Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org>
Series	target/riscv: Convert to decodetree \| expand [v7,00/35] target/riscv: Convert to decodetree [v7,01/35] target/riscv: Move CPURISCVState pointer to DisasContext [v7,02/35] target/riscv: Activate decodetree and implemnt LUI & AUIPC [v7,03/35] target/riscv: Convert RVXI branch insns to decodetree [v7,04/35] target/riscv: Convert RV32I load/store insns to decodetree [v7,05/35] target/riscv: Convert RV64I load/store insns to decodetree [v7,06/35] target/riscv: Convert RVXI arithmetic insns to decodetree [v7,07/35] target/riscv: Convert RVXI fence insns to decodetree [v7,08/35] target/riscv: Convert RVXI csr insns to decodetree [v7,09/35] target/riscv: Convert RVXM insns to decodetree [v7,10/35] target/riscv: Convert RV32A insns to decodetree [v7,11/35] target/riscv: Convert RV64A insns to decodetree [v7,12/35] target/riscv: Convert RV32F insns to decodetree [v7,13/35] target/riscv: Convert RV64F insns to decodetree [v7,14/35] target/riscv: Convert RV32D insns to decodetree [v7,15/35] target/riscv: Convert RV64D insns to decodetree [v7,16/35] target/riscv: Convert RV priv insns to decodetree [v7,17/35] target/riscv: Convert quadrant 0 of RVXC insns to decodetree [v7,18/35] target/riscv: Convert quadrant 1 of RVXC insns to decodetree [v7,19/35] target/riscv: Convert quadrant 2 of RVXC insns to decodetree [v7,20/35] target/riscv: Remove gen_jalr() [v7,21/35] target/riscv: Remove manual decoding from gen_branch() [v7,22/35] target/riscv: Remove manual decoding from gen_load() [v7,23/35] target/riscv: Remove manual decoding from gen_store() [v7,24/35] target/riscv: Move gen_arith_imm() decoding into trans_* functions [v7,25/35] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists [v7,26/35] target/riscv: Remove shift and slt insn manual decoding [v7,27/35] target/riscv: Remove manual decoding of RV32/64M insn [v7,28/35] target/riscv: Rename trans_arith to gen_arith [v7,29/35] target/riscv: Remove gen_system() [v7,30/35] target/riscv: Remove decode_RV32_64G() [v7,31/35] target/riscv: Convert @cs_2 insns to share translation functions [v7,32/35] target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns [v7,33/35] target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 [v7,34/35] target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 [v7,35/35] target/riscv: Remaining rvc insn reuse 32 bit translators

Palmer Dabbelt Feb. 13, 2019, 3:53 p.m. UTC

Palmer: I caused some merge conflicts in Bastian's patch set so I
figured I'd attempt to clean these up.  As far as I'm concerned v6 was
good to go, but since the merge conflicts were fairly extensive (if
somewhat mechanical) I'd like to pass the baton back to Bastian here for
at least a sanity check.

Hi,

this patchset converts the RISC-V decoder to decodetree in four major steps:

1) Convert 32-bit instructions to decodetree [Patch 1-16]:
    Many of the gen_* functions are called by the decode functions for 16-bit
    and 32-bit functions. If we move translation code from the gen_*
    functions to the generated trans_* functions of decode-tree, we get a lot of
    duplication. Therefore, we mostly generate calls to the old gen_* function
    which are properly replaced after step 2).

    Each of the trans_ functions are grouped into files corresponding to their
    ISA extension, e.g. addi which is in RV32I is translated in the file
    'trans_rvi.inc.c'.

2) Convert 16-bit instructions to decodetree [Patch 17-19]:
    All 16 bit instructions have a direct mapping to a 32 bit instruction. Thus,
    we convert the arguments in the 16 bit trans_ function to the arguments of
    the corresponding 32 bit instruction and call the 32 bit trans_ function.

3) Remove old manual decoding in gen_* function [Patch 20-30]:
    this move all manual translation code into the trans_* instructions of
    decode tree, such that we can remove the old decode_* functions.

4) Simplify RVC by reusing as much as possible from the RVG decoder as suggested
   by Richard. [Patch 31-35]

full tree available at
https://github.com/palmer-dabbelt/qemu/tree/riscv-dt-v7

Cheers,
Bastian

v6 -> v7:
    - Rebased on top of riscv-for-master-4.0-sf1, which contains a
      refactoring of the original translation code.
    - Added handling of mstatus.fs to the floating-point routines.

v5 -> v6:
    - fixed funky indentation

no-reply@patchew.org Feb. 15, 2019, 12:36 p.m. UTC | #1

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Switched to a new branch 'test'
4eec05709e target/riscv: Remaining rvc insn reuse 32 bit translators
84199f4926 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
5a78019a67 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
5bec6a64b6 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
47611045c0 target/riscv: Convert @cs_2 insns to share translation functions
3c4c483491 target/riscv: Remove decode_RV32_64G()
6ef8c39fa6 target/riscv: Remove gen_system()
9fe3e55d2b target/riscv: Rename trans_arith to gen_arith
9d2d48ec02 target/riscv: Remove manual decoding of RV32/64M insn
e2794103f7 target/riscv: Remove shift and slt insn manual decoding
d30d015ce4 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
a2e6454b6a target/riscv: Move gen_arith_imm() decoding into trans_* functions
fda235c1ce target/riscv: Remove manual decoding from gen_store()
b67503bc42 target/riscv: Remove manual decoding from gen_load()
e465b8aaaf target/riscv: Remove manual decoding from gen_branch()
23e6c18a44 target/riscv: Remove gen_jalr()
31b752d15c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
a01808aab6 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b50a3640f1 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
e5f7eef8ad target/riscv: Convert RV priv insns to decodetree
4e1d2b7b33 target/riscv: Convert RV64D insns to decodetree
17e3bea420 target/riscv: Convert RV32D insns to decodetree
c104db76b0 target/riscv: Convert RV64F insns to decodetree
20d85db11f target/riscv: Convert RV32F insns to decodetree
dcfa5c66e6 target/riscv: Convert RV64A insns to decodetree
90c9f7a5d8 target/riscv: Convert RV32A insns to decodetree
177c22347c target/riscv: Convert RVXM insns to decodetree
aeacaf087c target/riscv: Convert RVXI csr insns to decodetree
6d4b3813f2 target/riscv: Convert RVXI fence insns to decodetree
5f1a4b443e target/riscv: Convert RVXI arithmetic insns to decodetree
3e4657c256 target/riscv: Convert RV64I load/store insns to decodetree
fa8fd7f53a target/riscv: Convert RV32I load/store insns to decodetree
856c75bdfa target/riscv: Convert RVXI branch insns to decodetree
7f807ad471 target/riscv: Activate decodetree and implemnt LUI & AUIPC
3f3a36b6c1 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 3f3a36b6c144 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 7f807ad4718f (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 856c75bdfab3 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit fa8fd7f53ac6 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 3e4657c25667 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 5f1a4b443eba (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 6d4b3813f270 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit aeacaf087c3e (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 177c22347c20 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 90c9f7a5d8ff (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit dcfa5c66e65d (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 20d85db11f67 (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit c104db76b052 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 17e3bea4206f (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 4e1d2b7b333a (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit e5f7eef8ad73 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit b50a3640f1d0 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit a01808aab6ef (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 31b752d15c25 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 23e6c18a442b (target/riscv: Remove gen_jalr())
21/35 Checking commit e465b8aaafd9 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit b67503bc4283 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit fda235c1ce28 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit a2e6454b6a25 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit d30d015ce4f4 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit e2794103f742 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 9d2d48ec02ae (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 9fe3e55d2b31 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 6ef8c39fa624 (target/riscv: Remove gen_system())
30/35 Checking commit 3c4c4834911b (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 47611045c029 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 5bec6a64b680 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit 5a78019a6709 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 84199f492604 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 4eec05709e0f (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 12:40 p.m. UTC | #2

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
4eec057 target/riscv: Remaining rvc insn reuse 32 bit translators
84199f4 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
5a78019 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
5bec6a6 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
4761104 target/riscv: Convert @cs_2 insns to share translation functions
3c4c483 target/riscv: Remove decode_RV32_64G()
6ef8c39 target/riscv: Remove gen_system()
9fe3e55 target/riscv: Rename trans_arith to gen_arith
9d2d48e target/riscv: Remove manual decoding of RV32/64M insn
e279410 target/riscv: Remove shift and slt insn manual decoding
d30d015 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
a2e6454 target/riscv: Move gen_arith_imm() decoding into trans_* functions
fda235c target/riscv: Remove manual decoding from gen_store()
b67503b target/riscv: Remove manual decoding from gen_load()
e465b8a target/riscv: Remove manual decoding from gen_branch()
23e6c18 target/riscv: Remove gen_jalr()
31b752d target/riscv: Convert quadrant 2 of RVXC insns to decodetree
a01808a target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b50a364 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
e5f7eef target/riscv: Convert RV priv insns to decodetree
4e1d2b7 target/riscv: Convert RV64D insns to decodetree
17e3bea target/riscv: Convert RV32D insns to decodetree
c104db7 target/riscv: Convert RV64F insns to decodetree
20d85db target/riscv: Convert RV32F insns to decodetree
dcfa5c6 target/riscv: Convert RV64A insns to decodetree
90c9f7a target/riscv: Convert RV32A insns to decodetree
177c223 target/riscv: Convert RVXM insns to decodetree
aeacaf0 target/riscv: Convert RVXI csr insns to decodetree
6d4b381 target/riscv: Convert RVXI fence insns to decodetree
5f1a4b4 target/riscv: Convert RVXI arithmetic insns to decodetree
3e4657c target/riscv: Convert RV64I load/store insns to decodetree
fa8fd7f target/riscv: Convert RV32I load/store insns to decodetree
856c75b target/riscv: Convert RVXI branch insns to decodetree
7f807ad target/riscv: Activate decodetree and implemnt LUI & AUIPC
3f3a36b target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 3f3a36b6c144 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 7f807ad4718f (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 856c75bdfab3 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit fa8fd7f53ac6 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 3e4657c25667 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 5f1a4b443eba (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 6d4b3813f270 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit aeacaf087c3e (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 177c22347c20 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 90c9f7a5d8ff (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit dcfa5c66e65d (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 20d85db11f67 (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit c104db76b052 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 17e3bea4206f (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 4e1d2b7b333a (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit e5f7eef8ad73 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit b50a3640f1d0 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit a01808aab6ef (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 31b752d15c25 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 23e6c18a442b (target/riscv: Remove gen_jalr())
21/35 Checking commit e465b8aaafd9 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit b67503bc4283 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit fda235c1ce28 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit a2e6454b6a25 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit d30d015ce4f4 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit e2794103f742 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 9d2d48ec02ae (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 9fe3e55d2b31 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 6ef8c39fa624 (target/riscv: Remove gen_system())
30/35 Checking commit 3c4c4834911b (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 47611045c029 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 5bec6a64b680 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit 5a78019a6709 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 84199f492604 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 4eec05709e0f (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 1:07 p.m. UTC | #3

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
81ebc7cd30 target/riscv: Remaining rvc insn reuse 32 bit translators
07c0cfd32c target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
e1f0bb51b9 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
b35997f8d2 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
8bc9b0b985 target/riscv: Convert @cs_2 insns to share translation functions
e003dc6ca8 target/riscv: Remove decode_RV32_64G()
4a325930d3 target/riscv: Remove gen_system()
cb52b1ea61 target/riscv: Rename trans_arith to gen_arith
ee5a645075 target/riscv: Remove manual decoding of RV32/64M insn
b3a87befcc target/riscv: Remove shift and slt insn manual decoding
f18704ce0f target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d0a25b0fa4 target/riscv: Move gen_arith_imm() decoding into trans_* functions
2ca46e9bed target/riscv: Remove manual decoding from gen_store()
78512d19df target/riscv: Remove manual decoding from gen_load()
212a925137 target/riscv: Remove manual decoding from gen_branch()
2b7cdb3297 target/riscv: Remove gen_jalr()
1c3aa40166 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
93939ee9a2 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
117f7383e4 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
1dc304a953 target/riscv: Convert RV priv insns to decodetree
21873b847a target/riscv: Convert RV64D insns to decodetree
3bb9e01535 target/riscv: Convert RV32D insns to decodetree
25fd78228e target/riscv: Convert RV64F insns to decodetree
0ec4580130 target/riscv: Convert RV32F insns to decodetree
b688a74af7 target/riscv: Convert RV64A insns to decodetree
3e3b876eef target/riscv: Convert RV32A insns to decodetree
4c96ccaa38 target/riscv: Convert RVXM insns to decodetree
8d3945144d target/riscv: Convert RVXI csr insns to decodetree
372c0bd66c target/riscv: Convert RVXI fence insns to decodetree
63bab5f9af target/riscv: Convert RVXI arithmetic insns to decodetree
6b13955854 target/riscv: Convert RV64I load/store insns to decodetree
b462b29190 target/riscv: Convert RV32I load/store insns to decodetree
fef88e3955 target/riscv: Convert RVXI branch insns to decodetree
9a7b36e97b target/riscv: Activate decodetree and implemnt LUI & AUIPC
4acf01bc5b target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 4acf01bc5ba3 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 9a7b36e97b24 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit fef88e3955da (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit b462b29190b0 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 6b139558549d (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 63bab5f9af5b (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 372c0bd66ca4 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit 8d3945144df3 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 4c96ccaa38ac (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 3e3b876eefdc (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit b688a74af7db (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 0ec45801301f (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 25fd78228e88 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 3bb9e015352c (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21873b847a17 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 1dc304a95399 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 117f7383e425 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 93939ee9a2f4 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 1c3aa4016671 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 2b7cdb329758 (target/riscv: Remove gen_jalr())
21/35 Checking commit 212a9251371d (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 78512d19dfaa (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 2ca46e9bed7b (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit d0a25b0fa47d (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit f18704ce0f70 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit b3a87befcc10 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit ee5a6450750b (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit cb52b1ea618e (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 4a325930d344 (target/riscv: Remove gen_system())
30/35 Checking commit e003dc6ca8be (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 8bc9b0b98553 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit b35997f8d24a (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit e1f0bb51b974 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 07c0cfd32c28 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 81ebc7cd3073 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 1:11 p.m. UTC | #4

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/1550227757-10869-1-git-send-email-pbonzini@redhat.com -> patchew/1550227757-10869-1-git-send-email-pbonzini@redhat.com
 - [tag update]      patchew/1550227757-10869-3-git-send-email-pbonzini@redhat.com -> patchew/1550227757-10869-3-git-send-email-pbonzini@redhat.com
 - [tag update]      patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
81ebc7c target/riscv: Remaining rvc insn reuse 32 bit translators
07c0cfd target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
e1f0bb5 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
b35997f target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
8bc9b0b target/riscv: Convert @cs_2 insns to share translation functions
e003dc6 target/riscv: Remove decode_RV32_64G()
4a32593 target/riscv: Remove gen_system()
cb52b1e target/riscv: Rename trans_arith to gen_arith
ee5a645 target/riscv: Remove manual decoding of RV32/64M insn
b3a87be target/riscv: Remove shift and slt insn manual decoding
f18704c target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d0a25b0 target/riscv: Move gen_arith_imm() decoding into trans_* functions
2ca46e9 target/riscv: Remove manual decoding from gen_store()
78512d1 target/riscv: Remove manual decoding from gen_load()
212a925 target/riscv: Remove manual decoding from gen_branch()
2b7cdb3 target/riscv: Remove gen_jalr()
1c3aa40 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
93939ee target/riscv: Convert quadrant 1 of RVXC insns to decodetree
117f738 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
1dc304a target/riscv: Convert RV priv insns to decodetree
21873b8 target/riscv: Convert RV64D insns to decodetree
3bb9e01 target/riscv: Convert RV32D insns to decodetree
25fd782 target/riscv: Convert RV64F insns to decodetree
0ec4580 target/riscv: Convert RV32F insns to decodetree
b688a74 target/riscv: Convert RV64A insns to decodetree
3e3b876 target/riscv: Convert RV32A insns to decodetree
4c96cca target/riscv: Convert RVXM insns to decodetree
8d39451 target/riscv: Convert RVXI csr insns to decodetree
372c0bd target/riscv: Convert RVXI fence insns to decodetree
63bab5f target/riscv: Convert RVXI arithmetic insns to decodetree
6b13955 target/riscv: Convert RV64I load/store insns to decodetree
b462b29 target/riscv: Convert RV32I load/store insns to decodetree
fef88e3 target/riscv: Convert RVXI branch insns to decodetree
9a7b36e target/riscv: Activate decodetree and implemnt LUI & AUIPC
4acf01b target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 4acf01bc5ba3 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 9a7b36e97b24 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

ERROR: externs should be avoided in .c files
#124: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit fef88e3955da (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit b462b29190b0 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 6b139558549d (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 63bab5f9af5b (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 372c0bd66ca4 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit 8d3945144df3 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 4c96ccaa38ac (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 3e3b876eefdc (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit b688a74af7db (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 0ec45801301f (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#77: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 25fd78228e88 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 3bb9e015352c (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21873b847a17 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 1dc304a95399 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#40: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 117f7383e425 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#30: 
new file mode 100644

ERROR: externs should be avoided in .c files
#245: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 93939ee9a2f4 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 1c3aa4016671 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 2b7cdb329758 (target/riscv: Remove gen_jalr())
21/35 Checking commit 212a9251371d (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 78512d19dfaa (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 2ca46e9bed7b (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit d0a25b0fa47d (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit f18704ce0f70 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit b3a87befcc10 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit ee5a6450750b (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit cb52b1ea618e (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 4a325930d344 (target/riscv: Remove gen_system())
30/35 Checking commit e003dc6ca8be (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 8bc9b0b98553 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

ERROR: externs should be avoided in .c files
#181: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit b35997f8d24a (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit e1f0bb51b974 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 07c0cfd32c28 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 81ebc7cd3073 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

Bastian Koppelmann Feb. 15, 2019, 1:13 p.m. UTC | #5

On 2/13/19 4:53 PM, Palmer Dabbelt wrote:
> Palmer: I caused some merge conflicts in Bastian's patch set so I
> figured I'd attempt to clean these up.  As far as I'm concerned v6 was
> good to go, but since the merge conflicts were fairly extensive (if
> somewhat mechanical) I'd like to pass the baton back to Bastian here for
> at least a sanity check.


Except for my few remark, it looks good to me :). And for what its worth:

Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de

Cheers,

Bastian

no-reply@patchew.org Feb. 15, 2019, 1:38 p.m. UTC | #6

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Switched to a new branch 'test'
1c6bdfe989 target/riscv: Remaining rvc insn reuse 32 bit translators
d8ca8fce4a target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
c43a08f0e7 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
7658d5513c target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
12beb8bb47 target/riscv: Convert @cs_2 insns to share translation functions
f2a8173304 target/riscv: Remove decode_RV32_64G()
8894e2fe73 target/riscv: Remove gen_system()
2e8f564304 target/riscv: Rename trans_arith to gen_arith
d324cc4619 target/riscv: Remove manual decoding of RV32/64M insn
8dd0068daa target/riscv: Remove shift and slt insn manual decoding
9b9283643e target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d6590d16d7 target/riscv: Move gen_arith_imm() decoding into trans_* functions
47b407149e target/riscv: Remove manual decoding from gen_store()
e8e1df3a57 target/riscv: Remove manual decoding from gen_load()
1a7dbe9e06 target/riscv: Remove manual decoding from gen_branch()
dfc0199b2c target/riscv: Remove gen_jalr()
19a6562703 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
39bd80093d target/riscv: Convert quadrant 1 of RVXC insns to decodetree
a6d286ffb2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
8a6d6a3134 target/riscv: Convert RV priv insns to decodetree
21a55239ca target/riscv: Convert RV64D insns to decodetree
4be6a7c28c target/riscv: Convert RV32D insns to decodetree
d78760da75 target/riscv: Convert RV64F insns to decodetree
8597684b43 target/riscv: Convert RV32F insns to decodetree
39844028ac target/riscv: Convert RV64A insns to decodetree
6991b839b1 target/riscv: Convert RV32A insns to decodetree
29a6d49351 target/riscv: Convert RVXM insns to decodetree
4fa5d7b56e target/riscv: Convert RVXI csr insns to decodetree
ea579111ef target/riscv: Convert RVXI fence insns to decodetree
3db0b3f209 target/riscv: Convert RVXI arithmetic insns to decodetree
e4fa6cdb39 target/riscv: Convert RV64I load/store insns to decodetree
26069dcf70 target/riscv: Convert RV32I load/store insns to decodetree
f70fb7c7dd target/riscv: Convert RVXI branch insns to decodetree
82f3450ac7 target/riscv: Activate decodetree and implemnt LUI & AUIPC
6fc132406d target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 6fc132406dff (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 82f3450ac738 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit f70fb7c7ddae (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit 26069dcf702a (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit e4fa6cdb3991 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 3db0b3f2090b (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit ea579111ef40 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit 4fa5d7b56e95 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 29a6d4935194 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 6991b839b1a9 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 39844028ac4e (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 8597684b432c (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit d78760da752f (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 4be6a7c28c64 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21a55239cac5 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 8a6d6a3134dd (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit a6d286ffb24c (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 39bd80093d18 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 19a6562703b6 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit dfc0199b2cc3 (target/riscv: Remove gen_jalr())
21/35 Checking commit 1a7dbe9e0633 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit e8e1df3a570e (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 47b407149e90 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit d6590d16d7a6 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 9b9283643e0b (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 8dd0068daa6a (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit d324cc4619d9 (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 2e8f56430485 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 8894e2fe73ea (target/riscv: Remove gen_system())
30/35 Checking commit f2a81733046c (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 12beb8bb47f9 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 7658d5513c89 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit c43a08f0e7de (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit d8ca8fce4ad7 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 1c6bdfe98959 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 1:42 p.m. UTC | #7

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
1c6bdfe target/riscv: Remaining rvc insn reuse 32 bit translators
d8ca8fc target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
c43a08f target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
7658d55 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
12beb8b target/riscv: Convert @cs_2 insns to share translation functions
f2a8173 target/riscv: Remove decode_RV32_64G()
8894e2f target/riscv: Remove gen_system()
2e8f564 target/riscv: Rename trans_arith to gen_arith
d324cc4 target/riscv: Remove manual decoding of RV32/64M insn
8dd0068 target/riscv: Remove shift and slt insn manual decoding
9b92836 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
d6590d1 target/riscv: Move gen_arith_imm() decoding into trans_* functions
47b4071 target/riscv: Remove manual decoding from gen_store()
e8e1df3 target/riscv: Remove manual decoding from gen_load()
1a7dbe9 target/riscv: Remove manual decoding from gen_branch()
dfc0199 target/riscv: Remove gen_jalr()
19a6562 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
39bd800 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
a6d286f target/riscv: Convert quadrant 0 of RVXC insns to decodetree
8a6d6a3 target/riscv: Convert RV priv insns to decodetree
21a5523 target/riscv: Convert RV64D insns to decodetree
4be6a7c target/riscv: Convert RV32D insns to decodetree
d78760d target/riscv: Convert RV64F insns to decodetree
8597684 target/riscv: Convert RV32F insns to decodetree
3984402 target/riscv: Convert RV64A insns to decodetree
6991b83 target/riscv: Convert RV32A insns to decodetree
29a6d49 target/riscv: Convert RVXM insns to decodetree
4fa5d7b target/riscv: Convert RVXI csr insns to decodetree
ea57911 target/riscv: Convert RVXI fence insns to decodetree
3db0b3f target/riscv: Convert RVXI arithmetic insns to decodetree
e4fa6cd target/riscv: Convert RV64I load/store insns to decodetree
26069dc target/riscv: Convert RV32I load/store insns to decodetree
f70fb7c target/riscv: Convert RVXI branch insns to decodetree
82f3450 target/riscv: Activate decodetree and implemnt LUI & AUIPC
6fc1324 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 6fc132406dff (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 82f3450ac738 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit f70fb7c7ddae (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit 26069dcf702a (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit e4fa6cdb3991 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 3db0b3f2090b (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit ea579111ef40 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit 4fa5d7b56e95 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 29a6d4935194 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 6991b839b1a9 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 39844028ac4e (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 8597684b432c (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit d78760da752f (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 4be6a7c28c64 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 21a55239cac5 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 8a6d6a3134dd (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit a6d286ffb24c (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 39bd80093d18 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 19a6562703b6 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit dfc0199b2cc3 (target/riscv: Remove gen_jalr())
21/35 Checking commit 1a7dbe9e0633 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit e8e1df3a570e (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 47b407149e90 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit d6590d16d7a6 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 9b9283643e0b (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 8dd0068daa6a (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit d324cc4619d9 (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 2e8f56430485 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 8894e2fe73ea (target/riscv: Remove gen_system())
30/35 Checking commit f2a81733046c (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 12beb8bb47f9 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 7658d5513c89 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit c43a08f0e7de (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit d8ca8fce4ad7 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 1c6bdfe98959 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 2:11 p.m. UTC | #8

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213103519.32585-1-cohuck@redhat.com -> patchew/20190213103519.32585-1-cohuck@redhat.com
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
 * [new tag]               patchew/20190215133005.15955-1-david@redhat.com -> patchew/20190215133005.15955-1-david@redhat.com
Switched to a new branch 'test'
cf8af1b029 target/riscv: Remaining rvc insn reuse 32 bit translators
0b6387f173 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
f1b7137760 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
7255005fc3 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
29f833793b target/riscv: Convert @cs_2 insns to share translation functions
d113ec269f target/riscv: Remove decode_RV32_64G()
15aa79ab36 target/riscv: Remove gen_system()
e4ccd14332 target/riscv: Rename trans_arith to gen_arith
6388949a32 target/riscv: Remove manual decoding of RV32/64M insn
78099fcedd target/riscv: Remove shift and slt insn manual decoding
342f63d3e9 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
39904ddf17 target/riscv: Move gen_arith_imm() decoding into trans_* functions
fbf05a5809 target/riscv: Remove manual decoding from gen_store()
29ef6bb97f target/riscv: Remove manual decoding from gen_load()
540058e656 target/riscv: Remove manual decoding from gen_branch()
0422bbafd7 target/riscv: Remove gen_jalr()
c82bbaced6 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
29952fcaf7 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
7766855a03 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
b663f9ba3d target/riscv: Convert RV priv insns to decodetree
e1d0e2333d target/riscv: Convert RV64D insns to decodetree
11e36fa462 target/riscv: Convert RV32D insns to decodetree
7b63ef088b target/riscv: Convert RV64F insns to decodetree
8b820df832 target/riscv: Convert RV32F insns to decodetree
7573de5975 target/riscv: Convert RV64A insns to decodetree
837716c6f2 target/riscv: Convert RV32A insns to decodetree
fae0ce83bc target/riscv: Convert RVXM insns to decodetree
af0dfe7ffa target/riscv: Convert RVXI csr insns to decodetree
7053e564e9 target/riscv: Convert RVXI fence insns to decodetree
7e42764032 target/riscv: Convert RVXI arithmetic insns to decodetree
0b37b33fc9 target/riscv: Convert RV64I load/store insns to decodetree
ff2422c615 target/riscv: Convert RV32I load/store insns to decodetree
49355e5f61 target/riscv: Convert RVXI branch insns to decodetree
54db7873fc target/riscv: Activate decodetree and implemnt LUI & AUIPC
cdeadb1053 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit cdeadb1053e9 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 54db7873fc92 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 49355e5f6174 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit ff2422c61576 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 0b37b33fc9fe (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 7e42764032d5 (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 7053e564e9a3 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit af0dfe7ffafb (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit fae0ce83bcbf (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 837716c6f294 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 7573de59750d (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 8b820df8329d (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 7b63ef088ba6 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 11e36fa462e5 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit e1d0e2333dd2 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit b663f9ba3d4f (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 7766855a03fd (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 29952fcaf721 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit c82bbaced646 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 0422bbafd73f (target/riscv: Remove gen_jalr())
21/35 Checking commit 540058e656a4 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 29ef6bb97f00 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit fbf05a580992 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 39904ddf1719 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 342f63d3e937 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 78099fcedd02 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 6388949a324d (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit e4ccd1433265 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 15aa79ab365b (target/riscv: Remove gen_system())
30/35 Checking commit d113ec269f7e (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 29f833793b91 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 7255005fc359 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit f1b7137760c4 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 0b6387f173e5 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit cf8af1b029c4 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 2:42 p.m. UTC | #9

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Switched to a new branch 'test'
3016b4d562 target/riscv: Remaining rvc insn reuse 32 bit translators
24b06d360e target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
c429dc0bcc target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
4705800e73 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
b608143200 target/riscv: Convert @cs_2 insns to share translation functions
4f2f49f7d5 target/riscv: Remove decode_RV32_64G()
bdfd19cc02 target/riscv: Remove gen_system()
2595093a33 target/riscv: Rename trans_arith to gen_arith
a6184222b0 target/riscv: Remove manual decoding of RV32/64M insn
398d027afa target/riscv: Remove shift and slt insn manual decoding
6170fd65a1 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
acecc8ffa6 target/riscv: Move gen_arith_imm() decoding into trans_* functions
f02dc68f7e target/riscv: Remove manual decoding from gen_store()
99604155b9 target/riscv: Remove manual decoding from gen_load()
aa9bf2e767 target/riscv: Remove manual decoding from gen_branch()
2cfb58f450 target/riscv: Remove gen_jalr()
b771a0123b target/riscv: Convert quadrant 2 of RVXC insns to decodetree
79ff16294f target/riscv: Convert quadrant 1 of RVXC insns to decodetree
3d70d65273 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
c2e190ac41 target/riscv: Convert RV priv insns to decodetree
4aeb2ac0bd target/riscv: Convert RV64D insns to decodetree
1f3be1fde1 target/riscv: Convert RV32D insns to decodetree
fabadb15d8 target/riscv: Convert RV64F insns to decodetree
ad79932d92 target/riscv: Convert RV32F insns to decodetree
7c60184c2f target/riscv: Convert RV64A insns to decodetree
f376c10a5d target/riscv: Convert RV32A insns to decodetree
f72535b75d target/riscv: Convert RVXM insns to decodetree
ac4c92da37 target/riscv: Convert RVXI csr insns to decodetree
b8b2f75bcd target/riscv: Convert RVXI fence insns to decodetree
889af58774 target/riscv: Convert RVXI arithmetic insns to decodetree
8783bc3ad7 target/riscv: Convert RV64I load/store insns to decodetree
f6e82e189c target/riscv: Convert RV32I load/store insns to decodetree
db3017b90c target/riscv: Convert RVXI branch insns to decodetree
cd9d7ded20 target/riscv: Activate decodetree and implemnt LUI & AUIPC
4e9eb0f722 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 4e9eb0f722f6 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit cd9d7ded2086 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit db3017b90c9e (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit f6e82e189cc1 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 8783bc3ad755 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 889af587745b (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit b8b2f75bcd6c (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit ac4c92da37f0 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit f72535b75df2 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit f376c10a5dff (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 7c60184c2f69 (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit ad79932d9200 (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit fabadb15d83d (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 1f3be1fde113 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 4aeb2ac0bd68 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit c2e190ac4193 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 3d70d65273e0 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 79ff16294f9c (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit b771a0123b75 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 2cfb58f45074 (target/riscv: Remove gen_jalr())
21/35 Checking commit aa9bf2e7675d (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 99604155b9ab (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit f02dc68f7e0f (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit acecc8ffa600 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 6170fd65a1e5 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 398d027afad6 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit a6184222b0ac (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 2595093a335b (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit bdfd19cc024a (target/riscv: Remove gen_system())
30/35 Checking commit 4f2f49f7d504 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit b60814320091 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 4705800e7332 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit c429dc0bcc8e (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 24b06d360e27 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 3016b4d5628e (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 3:14 p.m. UTC | #10

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
 t [tag update]            patchew/20190215133005.15955-1-david@redhat.com -> patchew/20190215133005.15955-1-david@redhat.com
Switched to a new branch 'test'
41749753bc target/riscv: Remaining rvc insn reuse 32 bit translators
024596dd05 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
e9e182931c target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
58fa40505c target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
e3db55993f target/riscv: Convert @cs_2 insns to share translation functions
d1d2029ff2 target/riscv: Remove decode_RV32_64G()
a9fe5a25ea target/riscv: Remove gen_system()
803dc342db target/riscv: Rename trans_arith to gen_arith
a88849bcbb target/riscv: Remove manual decoding of RV32/64M insn
b961dec542 target/riscv: Remove shift and slt insn manual decoding
e11ca6b00d target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
90c517aabb target/riscv: Move gen_arith_imm() decoding into trans_* functions
deeec4309d target/riscv: Remove manual decoding from gen_store()
7143c951e9 target/riscv: Remove manual decoding from gen_load()
32d027745f target/riscv: Remove manual decoding from gen_branch()
589cff707b target/riscv: Remove gen_jalr()
918f53165b target/riscv: Convert quadrant 2 of RVXC insns to decodetree
a1be693016 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
904263fad2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
50fa542e07 target/riscv: Convert RV priv insns to decodetree
d0c5997811 target/riscv: Convert RV64D insns to decodetree
0b7e3a3c7e target/riscv: Convert RV32D insns to decodetree
e99251e477 target/riscv: Convert RV64F insns to decodetree
dcdcc961d7 target/riscv: Convert RV32F insns to decodetree
ad63f7f324 target/riscv: Convert RV64A insns to decodetree
30c0cd80b6 target/riscv: Convert RV32A insns to decodetree
7a5fde3c87 target/riscv: Convert RVXM insns to decodetree
cc4a27b930 target/riscv: Convert RVXI csr insns to decodetree
5795125296 target/riscv: Convert RVXI fence insns to decodetree
2f54263ec3 target/riscv: Convert RVXI arithmetic insns to decodetree
a05e71e427 target/riscv: Convert RV64I load/store insns to decodetree
d243b94bba target/riscv: Convert RV32I load/store insns to decodetree
862ba6525c target/riscv: Convert RVXI branch insns to decodetree
7387d5d18f target/riscv: Activate decodetree and implemnt LUI & AUIPC
171e78f1b0 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 171e78f1b033 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 7387d5d18ff2 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 862ba6525ca2 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit d243b94bba3f (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit a05e71e427dc (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 2f54263ec39e (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 5795125296da (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit cc4a27b93012 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 7a5fde3c8795 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 30c0cd80b672 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit ad63f7f32406 (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit dcdcc961d738 (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit e99251e477e7 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 0b7e3a3c7ead (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit d0c59978112c (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 50fa542e0783 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 904263fad2c6 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit a1be693016f7 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 918f53165b7b (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 589cff707b03 (target/riscv: Remove gen_jalr())
21/35 Checking commit 32d027745f74 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 7143c951e9b5 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit deeec4309dcf (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 90c517aabb01 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit e11ca6b00db3 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit b961dec54274 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit a88849bcbbca (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 803dc342db68 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit a9fe5a25eacb (target/riscv: Remove gen_system())
30/35 Checking commit d1d2029ff220 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit e3db55993f1c (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 58fa40505cd3 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit e9e182931cf6 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 024596dd0512 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 41749753bc27 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 3:45 p.m. UTC | #11

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Switched to a new branch 'test'
cc8505ed4b target/riscv: Remaining rvc insn reuse 32 bit translators
20585ad92f target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
65479e48d3 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
0f0ad0478b target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
35b75fe79c target/riscv: Convert @cs_2 insns to share translation functions
868cd4fedd target/riscv: Remove decode_RV32_64G()
10e50a6df3 target/riscv: Remove gen_system()
6cb56750e2 target/riscv: Rename trans_arith to gen_arith
88ae76827f target/riscv: Remove manual decoding of RV32/64M insn
1e89edb0db target/riscv: Remove shift and slt insn manual decoding
a9a86c88f6 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
54d57a38f7 target/riscv: Move gen_arith_imm() decoding into trans_* functions
9d975c5ed2 target/riscv: Remove manual decoding from gen_store()
39a6ac4cc7 target/riscv: Remove manual decoding from gen_load()
bb3f1a9065 target/riscv: Remove manual decoding from gen_branch()
f6b0aa0eeb target/riscv: Remove gen_jalr()
922f5dfe8f target/riscv: Convert quadrant 2 of RVXC insns to decodetree
47d4169732 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
b8fd40fa5d target/riscv: Convert quadrant 0 of RVXC insns to decodetree
aa08f561b9 target/riscv: Convert RV priv insns to decodetree
562ddec6c5 target/riscv: Convert RV64D insns to decodetree
1acdf9e129 target/riscv: Convert RV32D insns to decodetree
0ba2673905 target/riscv: Convert RV64F insns to decodetree
bf21af4f1e target/riscv: Convert RV32F insns to decodetree
4424cb5d0f target/riscv: Convert RV64A insns to decodetree
a2a5a1fb76 target/riscv: Convert RV32A insns to decodetree
b771102bf5 target/riscv: Convert RVXM insns to decodetree
e5c1995421 target/riscv: Convert RVXI csr insns to decodetree
5c0d5ac46f target/riscv: Convert RVXI fence insns to decodetree
5ac13d90b5 target/riscv: Convert RVXI arithmetic insns to decodetree
246245dbc4 target/riscv: Convert RV64I load/store insns to decodetree
b3ff5b70fb target/riscv: Convert RV32I load/store insns to decodetree
5d5c02adda target/riscv: Convert RVXI branch insns to decodetree
2888a8cc40 target/riscv: Activate decodetree and implemnt LUI & AUIPC
9a5764e348 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 9a5764e348ca (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 2888a8cc4045 (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 5d5c02adda8d (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit b3ff5b70fb2d (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 246245dbc443 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 5ac13d90b5b4 (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 5c0d5ac46f2f (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit e5c19954210c (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit b771102bf538 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit a2a5a1fb7667 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 4424cb5d0f44 (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit bf21af4f1eae (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 0ba2673905a4 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 1acdf9e12925 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 562ddec6c595 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit aa08f561b932 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit b8fd40fa5d30 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 47d416973290 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit 922f5dfe8f10 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit f6b0aa0eebe6 (target/riscv: Remove gen_jalr())
21/35 Checking commit bb3f1a906551 (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit 39a6ac4cc710 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 9d975c5ed265 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 54d57a38f72d (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit a9a86c88f628 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 1e89edb0db52 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 88ae76827f0b (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 6cb56750e21e (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 10e50a6df34c (target/riscv: Remove gen_system())
30/35 Checking commit 868cd4fedd03 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 35b75fe79c93 (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 0f0ad0478bbc (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit 65479e48d38a (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 20585ad92fbf (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit cc8505ed4b99 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 4:39 p.m. UTC | #12

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
159ce3d785 target/riscv: Remaining rvc insn reuse 32 bit translators
b9c5f05eab target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
f121eb761c target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
ea8488d10a target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
9f90e41eee target/riscv: Convert @cs_2 insns to share translation functions
547089b5b6 target/riscv: Remove decode_RV32_64G()
ed71f5d6bb target/riscv: Remove gen_system()
5bd06b38b3 target/riscv: Rename trans_arith to gen_arith
67bcaf79f6 target/riscv: Remove manual decoding of RV32/64M insn
1db291fda8 target/riscv: Remove shift and slt insn manual decoding
9e2443a1f5 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
9470964879 target/riscv: Move gen_arith_imm() decoding into trans_* functions
8996df7161 target/riscv: Remove manual decoding from gen_store()
f6544b5016 target/riscv: Remove manual decoding from gen_load()
95d0aec06f target/riscv: Remove manual decoding from gen_branch()
bca491d572 target/riscv: Remove gen_jalr()
aa2300cc7e target/riscv: Convert quadrant 2 of RVXC insns to decodetree
606ad192b6 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
a0e7a31879 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
1a076e50a0 target/riscv: Convert RV priv insns to decodetree
c474628022 target/riscv: Convert RV64D insns to decodetree
387a97fad2 target/riscv: Convert RV32D insns to decodetree
13cc6dbc4d target/riscv: Convert RV64F insns to decodetree
31c239b6b0 target/riscv: Convert RV32F insns to decodetree
991c4a31fd target/riscv: Convert RV64A insns to decodetree
ba101b5610 target/riscv: Convert RV32A insns to decodetree
86ecfc5a0e target/riscv: Convert RVXM insns to decodetree
a9ac09a20b target/riscv: Convert RVXI csr insns to decodetree
476f9b2401 target/riscv: Convert RVXI fence insns to decodetree
b90ac58947 target/riscv: Convert RVXI arithmetic insns to decodetree
795f3b5f6b target/riscv: Convert RV64I load/store insns to decodetree
bdaaf05af4 target/riscv: Convert RV32I load/store insns to decodetree
e3a8765ce0 target/riscv: Convert RVXI branch insns to decodetree
af57dee3cb target/riscv: Activate decodetree and implemnt LUI & AUIPC
2026d9d7cd target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 2026d9d7cd47 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit af57dee3cb1f (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit e3a8765ce0f3 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit bdaaf05af449 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 795f3b5f6b05 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit b90ac589471d (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 476f9b2401c3 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit a9ac09a20be5 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 86ecfc5a0e78 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit ba101b56105e (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 991c4a31fd9a (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 31c239b6b03e (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 13cc6dbc4dd5 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 387a97fad262 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit c4746280227f (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 1a076e50a0e1 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit a0e7a318794d (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 606ad192b60a (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit aa2300cc7ea8 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit bca491d572b2 (target/riscv: Remove gen_jalr())
21/35 Checking commit 95d0aec06f1c (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit f6544b5016e9 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 8996df716183 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 947096487916 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 9e2443a1f5c9 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 1db291fda8f0 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 67bcaf79f6e5 (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 5bd06b38b3eb (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit ed71f5d6bbbc (target/riscv: Remove gen_system())
30/35 Checking commit 547089b5b669 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 9f90e41eee6d (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit ea8488d10a09 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit f121eb761c43 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit b9c5f05eaba7 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 159ce3d78550 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 4:42 p.m. UTC | #13

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   81dbcfa..1e36232  master     -> master
 - [tag update]      patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '3464681b2b5983df80086a40179d324102347da3'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
159ce3d target/riscv: Remaining rvc insn reuse 32 bit translators
b9c5f05 target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
f121eb7 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
ea8488d target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
9f90e41 target/riscv: Convert @cs_2 insns to share translation functions
547089b target/riscv: Remove decode_RV32_64G()
ed71f5d target/riscv: Remove gen_system()
5bd06b3 target/riscv: Rename trans_arith to gen_arith
67bcaf7 target/riscv: Remove manual decoding of RV32/64M insn
1db291f target/riscv: Remove shift and slt insn manual decoding
9e2443a target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
9470964 target/riscv: Move gen_arith_imm() decoding into trans_* functions
8996df7 target/riscv: Remove manual decoding from gen_store()
f6544b5 target/riscv: Remove manual decoding from gen_load()
95d0aec target/riscv: Remove manual decoding from gen_branch()
bca491d target/riscv: Remove gen_jalr()
aa2300c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
606ad19 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
a0e7a31 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
1a076e5 target/riscv: Convert RV priv insns to decodetree
c474628 target/riscv: Convert RV64D insns to decodetree
387a97f target/riscv: Convert RV32D insns to decodetree
13cc6db target/riscv: Convert RV64F insns to decodetree
31c239b target/riscv: Convert RV32F insns to decodetree
991c4a3 target/riscv: Convert RV64A insns to decodetree
ba101b5 target/riscv: Convert RV32A insns to decodetree
86ecfc5 target/riscv: Convert RVXM insns to decodetree
a9ac09a target/riscv: Convert RVXI csr insns to decodetree
476f9b2 target/riscv: Convert RVXI fence insns to decodetree
b90ac58 target/riscv: Convert RVXI arithmetic insns to decodetree
795f3b5 target/riscv: Convert RV64I load/store insns to decodetree
bdaaf05 target/riscv: Convert RV32I load/store insns to decodetree
e3a8765 target/riscv: Convert RVXI branch insns to decodetree
af57dee target/riscv: Activate decodetree and implemnt LUI & AUIPC
2026d9d target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 2026d9d7cd47 (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit af57dee3cb1f (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit e3a8765ce0f3 (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit bdaaf05af449 (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 795f3b5f6b05 (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit b90ac589471d (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 476f9b2401c3 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit a9ac09a20be5 (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit 86ecfc5a0e78 (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit ba101b56105e (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 991c4a31fd9a (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 31c239b6b03e (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 13cc6dbc4dd5 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 387a97fad262 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit c4746280227f (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 1a076e50a0e1 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit a0e7a318794d (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 606ad192b60a (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit aa2300cc7ea8 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit bca491d572b2 (target/riscv: Remove gen_jalr())
21/35 Checking commit 95d0aec06f1c (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit f6544b5016e9 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 8996df716183 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 947096487916 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 9e2443a1f5c9 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit 1db291fda8f0 (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit 67bcaf79f6e5 (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit 5bd06b38b3eb (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit ed71f5d6bbbc (target/riscv: Remove gen_system())
30/35 Checking commit 547089b5b669 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit 9f90e41eee6d (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit ea8488d10a09 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit f121eb761c43 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit b9c5f05eaba7 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 159ce3d78550 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com

no-reply@patchew.org Feb. 15, 2019, 5:11 p.m. UTC | #14

Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-palmer@sifive.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190213155414.22285-1-palmer@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190213155414.22285-1-palmer@sifive.com -> patchew/20190213155414.22285-1-palmer@sifive.com
Switched to a new branch 'test'
286c4c9db5 target/riscv: Remaining rvc insn reuse 32 bit translators
7f0b9c834a target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64
62ceaba961 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
5bdfb9a276 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
e33fc78d3c target/riscv: Convert @cs_2 insns to share translation functions
64f5ee6371 target/riscv: Remove decode_RV32_64G()
5d14d7839a target/riscv: Remove gen_system()
d95874a514 target/riscv: Rename trans_arith to gen_arith
c73e893d50 target/riscv: Remove manual decoding of RV32/64M insn
e94f276952 target/riscv: Remove shift and slt insn manual decoding
9a25e29bee target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
3462307e00 target/riscv: Move gen_arith_imm() decoding into trans_* functions
0a7f24e329 target/riscv: Remove manual decoding from gen_store()
dbaf88f810 target/riscv: Remove manual decoding from gen_load()
5b7707c586 target/riscv: Remove manual decoding from gen_branch()
278e17e313 target/riscv: Remove gen_jalr()
c19ca2ef2c target/riscv: Convert quadrant 2 of RVXC insns to decodetree
41049ff073 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
ff9416425a target/riscv: Convert quadrant 0 of RVXC insns to decodetree
5fcca52ad1 target/riscv: Convert RV priv insns to decodetree
c9ee049a87 target/riscv: Convert RV64D insns to decodetree
4a11745327 target/riscv: Convert RV32D insns to decodetree
c0bcb1721a target/riscv: Convert RV64F insns to decodetree
9b908114f9 target/riscv: Convert RV32F insns to decodetree
47c845fbf6 target/riscv: Convert RV64A insns to decodetree
ff33e22cc2 target/riscv: Convert RV32A insns to decodetree
f6b9a9237a target/riscv: Convert RVXM insns to decodetree
88e8b26c24 target/riscv: Convert RVXI csr insns to decodetree
898516b2da target/riscv: Convert RVXI fence insns to decodetree
577ad28fa2 target/riscv: Convert RVXI arithmetic insns to decodetree
53641e2485 target/riscv: Convert RV64I load/store insns to decodetree
3d7f44fb4e target/riscv: Convert RV32I load/store insns to decodetree
0b29012e69 target/riscv: Convert RVXI branch insns to decodetree
69e189ce25 target/riscv: Activate decodetree and implemnt LUI & AUIPC
d61ed337ed target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit d61ed337edca (target/riscv: Move CPURISCVState pointer to DisasContext)
2/35 Checking commit 69e189ce252c (target/riscv: Activate decodetree and implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit 0b29012e69ee (target/riscv: Convert RVXI branch insns to decodetree)
4/35 Checking commit 3d7f44fb4e2e (target/riscv: Convert RV32I load/store insns to decodetree)
5/35 Checking commit 53641e24852f (target/riscv: Convert RV64I load/store insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 577ad28fa224 (target/riscv: Convert RVXI arithmetic insns to decodetree)
7/35 Checking commit 898516b2da81 (target/riscv: Convert RVXI fence insns to decodetree)
8/35 Checking commit 88e8b26c24cf (target/riscv: Convert RVXI csr insns to decodetree)
9/35 Checking commit f6b9a9237a5d (target/riscv: Convert RVXM insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit ff33e22cc271 (target/riscv: Convert RV32A insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 47c845fbf6ea (target/riscv: Convert RV64A insns to decodetree)
12/35 Checking commit 9b908114f998 (target/riscv: Convert RV32F insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit c0bcb1721ae3 (target/riscv: Convert RV64F insns to decodetree)
14/35 Checking commit 4a1174532733 (target/riscv: Convert RV32D insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit c9ee049a8734 (target/riscv: Convert RV64D insns to decodetree)
16/35 Checking commit 5fcca52ad1d0 (target/riscv: Convert RV priv insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit ff9416425a31 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 41049ff073ce (target/riscv: Convert quadrant 1 of RVXC insns to decodetree)
19/35 Checking commit c19ca2ef2c82 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree)
20/35 Checking commit 278e17e313c1 (target/riscv: Remove gen_jalr())
21/35 Checking commit 5b7707c586cd (target/riscv: Remove manual decoding from gen_branch())
22/35 Checking commit dbaf88f810a1 (target/riscv: Remove manual decoding from gen_load())
23/35 Checking commit 0a7f24e329b7 (target/riscv: Remove manual decoding from gen_store())
24/35 Checking commit 3462307e0056 (target/riscv: Move gen_arith_imm() decoding into trans_* functions)
25/35 Checking commit 9a25e29beee6 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists)
26/35 Checking commit e94f2769525e (target/riscv: Remove shift and slt insn manual decoding)
27/35 Checking commit c73e893d503c (target/riscv: Remove manual decoding of RV32/64M insn)
28/35 Checking commit d95874a514b7 (target/riscv: Rename trans_arith to gen_arith)
29/35 Checking commit 5d14d7839a39 (target/riscv: Remove gen_system())
30/35 Checking commit 64f5ee6371d8 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit e33fc78d3c6d (target/riscv: Convert @cs_2 insns to share translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 5bdfb9a27697 (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns)
33/35 Checking commit 62ceaba9616a (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 7f0b9c834a1d (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64)
35/35 Checking commit 286c4c9db5a8 (target/riscv: Remaining rvc insn reuse 32 bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190213155414.22285-1-palmer@sifive.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

Bastian Koppelmann Feb. 20, 2019, 5:02 p.m. UTC | #15

Hi Palmer,

On 2/13/19 4:53 PM, Palmer Dabbelt wrote:
> Palmer: I caused some merge conflicts in Bastian's patch set so I
> figured I'd attempt to clean these up.  As far as I'm concerned v6 was
> good to go, but since the merge conflicts were fairly extensive (if
> somewhat mechanical) I'd like to pass the baton back to Bastian here for
> at least a sanity check.


Thanks for doing the merge. I will have time on Friday to integrate my 
nitpicks and send a v8. Then it should be good to be merged.

Cheers,

Bastian

Palmer Dabbelt Feb. 21, 2019, 5:23 p.m. UTC | #16

On Wed, 20 Feb 2019 09:02:57 PST (-0800), Bastian Koppelmann wrote:
> Hi Palmer,
>
> On 2/13/19 4:53 PM, Palmer Dabbelt wrote:
>> Palmer: I caused some merge conflicts in Bastian's patch set so I
>> figured I'd attempt to clean these up.  As far as I'm concerned v6 was
>> good to go, but since the merge conflicts were fairly extensive (if
>> somewhat mechanical) I'd like to pass the baton back to Bastian here for
>> at least a sanity check.
>
>
> Thanks for doing the merge. I will have time on Friday to integrate my
> nitpicks and send a v8. Then it should be good to be merged.

Great, thanks!  I haven't gotten a chance to look, but I want to get this in 
before anything else so we don't end up with a bunch of conflicts again :)

[v7,00/35] target/riscv: Convert to decodetree

Message

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