Message ID | 20190226070221.22382-1-bjorn.andersson@linaro.org (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show |
Series | clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks | expand |
Quoting Bjorn Andersson (2019-02-25 23:02:21) > The PCIe PIPE clock in the GCC is fed by the PIPE clock coming from the > PHY, describe this relationship. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c index 58fa5c247af1..7131dcf9b060 100644 --- a/drivers/clk/qcom/gcc-sdm845.c +++ b/drivers/clk/qcom/gcc-sdm845.c @@ -1703,6 +1703,9 @@ static struct clk_branch gcc_pcie_0_pipe_clk = { .enable_mask = BIT(4), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_0_pipe_clk", + .parent_names = (const char *[]){ "pcie_0_pipe_clk" }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -1802,6 +1805,8 @@ static struct clk_branch gcc_pcie_1_pipe_clk = { .enable_mask = BIT(30), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_1_pipe_clk", + .parent_names = (const char *[]){ "pcie_1_pipe_clk" }, + .num_parents = 1, .ops = &clk_branch2_ops, }, },
The PCIe PIPE clock in the GCC is fed by the PIPE clock coming from the PHY, describe this relationship. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- drivers/clk/qcom/gcc-sdm845.c | 5 +++++ 1 file changed, 5 insertions(+)