diff mbox series

arm64: dts: imx8mq: Add on-chip OTP controller node

Message ID 20190226090448.24364-1-ccaione@baylibre.com (mailing list archive)
State Mainlined, archived
Commit 9e113b2e87758a6a0150e0878d2d86b14a0a5328
Headers show
Series arm64: dts: imx8mq: Add on-chip OTP controller node | expand

Commit Message

Carlo Caione Feb. 26, 2019, 9:04 a.m. UTC
Add the node for the OTP controller.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Abel Vesa Feb. 28, 2019, 11 a.m. UTC | #1
On 19-02-26 09:04:48, Carlo Caione wrote:
> Add the node for the OTP controller.
> 
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 9155bd4784eb..6a1cc183a301 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -244,6 +244,14 @@
>  				reg = <0x30340000 0x10000>;
>  			};
>  
> +			ocotp: ocotp-ctrl@30350000 {
> +				compatible = "fsl,imx8mq-ocotp", "syscon";
> +				reg = <0x30350000 0x10000>;
> +				clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +			};
> +
>  			anatop: syscon@30360000 {
>  				compatible = "fsl,imx8mq-anatop", "syscon";
>  				reg = <0x30360000 0x10000>;
> -- 
> 2.19.1
>
Shawn Guo March 4, 2019, 1:24 a.m. UTC | #2
On Tue, Feb 26, 2019 at 09:04:48AM +0000, Carlo Caione wrote:
> Add the node for the OTP controller.
> 
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 9155bd4784eb..6a1cc183a301 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -244,6 +244,14 @@ 
 				reg = <0x30340000 0x10000>;
 			};
 
+			ocotp: ocotp-ctrl@30350000 {
+				compatible = "fsl,imx8mq-ocotp", "syscon";
+				reg = <0x30350000 0x10000>;
+				clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+			};
+
 			anatop: syscon@30360000 {
 				compatible = "fsl,imx8mq-anatop", "syscon";
 				reg = <0x30360000 0x10000>;