| Message ID | 20190320201402.114309-1-dianders@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288 | expand |
On Wed, Mar 20, 2019 at 01:13:59PM -0700, Douglas Anderson wrote: > It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > arch/arm/boot/dts/rk3288.dtsi | 26 +++++++++++++------------- > 1 file changed, 13 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index 09868dcee34b..e9f454248398 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi > @@ -1378,19 +1378,6 @@ > reg = <0x0 0xffaf0080 0x0 0x20>; > }; > > - gic: interrupt-controller@ffc01000 { > - compatible = "arm,gic-400"; > - interrupt-controller; > - #interrupt-cells = <3>; > - #address-cells = <0>; > - > - reg = <0x0 0xffc01000 0x0 0x1000>, > - <0x0 0xffc02000 0x0 0x2000>, > - <0x0 0xffc04000 0x0 0x2000>, > - <0x0 0xffc06000 0x0 0x2000>; > - interrupts = <GIC_PPI 9 0xf04>; > - }; > - > efuse: efuse@ffb40000 { > compatible = "rockchip,rk3288-efuse"; > reg = <0x0 0xffb40000 0x0 0x20>; > @@ -1404,6 +1391,19 @@ > }; > }; > > + gic: interrupt-controller@ffc01000 { > + compatible = "arm,gic-400"; > + interrupt-controller; > + #interrupt-cells = <3>; > + #address-cells = <0>; > + > + reg = <0x0 0xffc01000 0x0 0x1000>, > + <0x0 0xffc02000 0x0 0x2000>, > + <0x0 0xffc04000 0x0 0x2000>, > + <0x0 0xffc06000 0x0 0x2000>; > + interrupts = <GIC_PPI 9 0xf04>; > + }; > + > pinctrl: pinctrl { > compatible = "rockchip,rk3288-pinctrl"; > rockchip,grf = <&grf>; Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Am Mittwoch, 20. März 2019, 21:13:59 CET schrieb Douglas Anderson: > It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> applied patch1 for 5.2 and the other 3 as fixes for 5.1 Thanks Heiko
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 09868dcee34b..e9f454248398 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1378,19 +1378,6 @@ reg = <0x0 0xffaf0080 0x0 0x20>; }; - gic: interrupt-controller@ffc01000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - - reg = <0x0 0xffc01000 0x0 0x1000>, - <0x0 0xffc02000 0x0 0x2000>, - <0x0 0xffc04000 0x0 0x2000>, - <0x0 0xffc06000 0x0 0x2000>; - interrupts = <GIC_PPI 9 0xf04>; - }; - efuse: efuse@ffb40000 { compatible = "rockchip,rk3288-efuse"; reg = <0x0 0xffb40000 0x0 0x20>; @@ -1404,6 +1391,19 @@ }; }; + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <0>; + + reg = <0x0 0xffc01000 0x0 0x1000>, + <0x0 0xffc02000 0x0 0x2000>, + <0x0 0xffc04000 0x0 0x2000>, + <0x0 0xffc06000 0x0 0x2000>; + interrupts = <GIC_PPI 9 0xf04>; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3288-pinctrl"; rockchip,grf = <&grf>;
It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm/boot/dts/rk3288.dtsi | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-)