diff mbox series

[16/28] ARM: dts: sun8i: A23/A33: Fix pinctrl node names

Message ID 20190325135300.6440-16-maxime.ripard@bootlin.com (mailing list archive)
State New, archived
Headers show
Series [01/28] dt-bindings: arm: Remove the CPU compatible documentation | expand

Commit Message

Maxime Ripard March 25, 2019, 1:52 p.m. UTC 
The NAND pinctrl nodes names don't follow the pattern we've used and
enforced for some time. Make sure they do.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
 arch/arm/boot/dts/sun8i-a23-a33.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Chen-Yu Tsai March 25, 2019, 5:02 p.m. UTC | #1 
On Mon, Mar 25, 2019 at 9:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> The NAND pinctrl nodes names don't follow the pattern we've used and
> enforced for some time. Make sure they do.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

Acked-by: Chen-Yu Tsai <wens@csie.org>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 738618cde72f..f999588c6af2 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -394,25 +394,25 @@ 
 				function = "nand0";
 			};
 
-			nand_pins_cs0: nand-pins-cs0 {
+			nand_cs0_pin: nand-cs0-pin {
 				pins = "PC4";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_cs1: nand-pins-cs1 {
+			nand_cs1_pin: nand-cs1-pin {
 				pins = "PC3";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_rb0: nand-pins-rb0 {
+			nand_rb0_pin: nand-rb0-pin {
 				pins = "PC6";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_rb1: nand-pins-rb1 {
+			nand_rb1_pin: nand-rb1-pin {
 				pins = "PC7";
 				function = "nand0";
 				bias-pull-up;