| Message ID | 20190322071111.32432-1-josephl@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] arm64: tegra: Add pinmux for PWM-based DFLL support on Shield platform | expand |
On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote: > Add pinmux for PWM-based DFLL support on Shield platform. > > Signed-off-by: Joseph Lo <josephl@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) There's been some discussion recently about moving away from programming pinmux in the kernel because it isn't always safe to do that. The idea is that early boot firmware (typically cboot) will already have set up the pinmux, so there's no need to do it again in the kernel. These look like you're going to change this pin to/from tristate at runtime, so perhaps that's the kind of thing that we're okay with? Adding Stephen for visibility. Thierry > diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi > index 88a4b9333d84..c668f16c8574 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi > @@ -1318,6 +1318,20 @@ > nvidia,open-drain = <TEGRA_PIN_DISABLE>; > }; > }; > + > + dvfs_pwm_active_state: dvfs_pwm_active { > + dvfs_pwm_pbb1 { > + nvidia,pins = "dvfs_pwm_pbb1"; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + }; > + }; > + > + dvfs_pwm_inactive_state: dvfs_pwm_inactive { > + dvfs_pwm_pbb1 { > + nvidia,pins = "dvfs_pwm_pbb1"; > + nvidia,tristate = <TEGRA_PIN_ENABLE>; > + }; > + }; > }; > > serial@70006000 { > -- > 2.21.0 >
On 3/22/19 5:52 PM, Thierry Reding wrote: > On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote: >> Add pinmux for PWM-based DFLL support on Shield platform. >> >> Signed-off-by: Joseph Lo <josephl@nvidia.com> >> --- >> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) > > There's been some discussion recently about moving away from programming > pinmux in the kernel because it isn't always safe to do that. The idea > is that early boot firmware (typically cboot) will already have set up > the pinmux, so there's no need to do it again in the kernel. > > These look like you're going to change this pin to/from tristate at > runtime, so perhaps that's the kind of thing that we're okay with? > > Adding Stephen for visibility. Gentle ping. Thanks, Joseph > > Thierry > >> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >> index 88a4b9333d84..c668f16c8574 100644 >> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >> @@ -1318,6 +1318,20 @@ >> nvidia,open-drain = <TEGRA_PIN_DISABLE>; >> }; >> }; >> + >> + dvfs_pwm_active_state: dvfs_pwm_active { >> + dvfs_pwm_pbb1 { >> + nvidia,pins = "dvfs_pwm_pbb1"; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + }; >> + }; >> + >> + dvfs_pwm_inactive_state: dvfs_pwm_inactive { >> + dvfs_pwm_pbb1 { >> + nvidia,pins = "dvfs_pwm_pbb1"; >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >> + }; >> + }; >> }; >> >> serial@70006000 { >> -- >> 2.21.0 >>
On 4/2/19 11:06 AM, Joseph Lo wrote: > On 3/22/19 5:52 PM, Thierry Reding wrote: >> On Fri, Mar 22, 2019 at 03:11:10PM +0800, Joseph Lo wrote: >>> Add pinmux for PWM-based DFLL support on Shield platform. >>> >>> Signed-off-by: Joseph Lo <josephl@nvidia.com> >>> --- >>> arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++ >>> 1 file changed, 14 insertions(+) >> >> There's been some discussion recently about moving away from programming >> pinmux in the kernel because it isn't always safe to do that. The idea >> is that early boot firmware (typically cboot) will already have set up >> the pinmux, so there's no need to do it again in the kernel. >> >> These look like you're going to change this pin to/from tristate at >> runtime, so perhaps that's the kind of thing that we're okay with? >> >> Adding Stephen for visibility. > > Gentle ping. > If there is no further objection, could we apply this series? Thanks, Joseph >> >>> diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >>> b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >>> index 88a4b9333d84..c668f16c8574 100644 >>> --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >>> +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi >>> @@ -1318,6 +1318,20 @@ >>> nvidia,open-drain = <TEGRA_PIN_DISABLE>; >>> }; >>> }; >>> + >>> + dvfs_pwm_active_state: dvfs_pwm_active { >>> + dvfs_pwm_pbb1 { >>> + nvidia,pins = "dvfs_pwm_pbb1"; >>> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >>> + }; >>> + }; >>> + >>> + dvfs_pwm_inactive_state: dvfs_pwm_inactive { >>> + dvfs_pwm_pbb1 { >>> + nvidia,pins = "dvfs_pwm_pbb1"; >>> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >>> + }; >>> + }; >>> }; >>> serial@70006000 { >>> -- >>> 2.21.0 >>> > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi index 88a4b9333d84..c668f16c8574 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi @@ -1318,6 +1318,20 @@ nvidia,open-drain = <TEGRA_PIN_DISABLE>; }; }; + + dvfs_pwm_active_state: dvfs_pwm_active { + dvfs_pwm_pbb1 { + nvidia,pins = "dvfs_pwm_pbb1"; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + + dvfs_pwm_inactive_state: dvfs_pwm_inactive { + dvfs_pwm_pbb1 { + nvidia,pins = "dvfs_pwm_pbb1"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + }; }; serial@70006000 {
Add pinmux for PWM-based DFLL support on Shield platform. Signed-off-by: Joseph Lo <josephl@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)