| Message ID | 1550648893-42050-6-git-send-email-Jerry-Ch.chen@mediatek.com (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
| Series | media: platform: Add support for Face Detection (FD) on mt8183 SoC | expand |
On Wed, Feb 20, 2019 at 03:48:11PM +0800, Jerry-ch Chen wrote: > This patch adds nodes for Face Detection (FD) unit. FD is embedded > in Mediatek SoCs and works with the co-processor to perform face > detection on the input data and image and output detected face result. > > Signed-off-by: Jerry-ch Chen <jerry-ch.chen@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index b3d8dfd..45c7e2f 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -440,6 +440,26 @@ > #clock-cells = <1>; > }; > > + fd_smem: fd_smem { > + compatible = "mediatek,fd_smem"; > + mediatek,larb = <&larb5>; > + iommus = <&iommu M4U_PORT_CAM_IMGI>; This doesn't look like an actual h/w device... > + }; > + > + fd:fd@1502b000 { space after the : ^ > + compatible = "mediatek,fd"; Should be SoC specific. > + mediatek,larb = <&larb5>; > + mediatek,vpu = <&vpu>; > + iommus = <&iommu M4U_PORT_CAM_FDVT_RP>, > + <&iommu M4U_PORT_CAM_FDVT_WR>, > + <&iommu M4U_PORT_CAM_FDVT_RB>; > + reg = <0 0x1502b000 0 0x1000>; > + interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&imgsys CLK_IMG_FDVT>; > + clock-names = "FD_CLK_IMG_FD"; > + smem_device = <&fd_smem>; > + }; > + > vdecsys: syscon@16000000 { > compatible = "mediatek,mt8183-vdecsys", "syscon"; > reg = <0 0x16000000 0 0x1000>; > -- > 1.9.1 >
On Tue, 2019-03-26 at 05:57 +0800, Rob Herring wrote: > On Wed, Feb 20, 2019 at 03:48:11PM +0800, Jerry-ch Chen wrote: > > This patch adds nodes for Face Detection (FD) unit. FD is embedded > > in Mediatek SoCs and works with the co-processor to perform face > > detection on the input data and image and output detected face result. > > > > Signed-off-by: Jerry-ch Chen <jerry-ch.chen@mediatek.com> > > --- > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > index b3d8dfd..45c7e2f 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > > @@ -440,6 +440,26 @@ > > #clock-cells = <1>; > > }; > > > > + fd_smem: fd_smem { > > + compatible = "mediatek,fd_smem"; > > + mediatek,larb = <&larb5>; > > + iommus = <&iommu M4U_PORT_CAM_IMGI>; > > This doesn't look like an actual h/w device... > Thank you for your comments. fd_smem is not an actual h/w device and it will not be used in the future. We are going to remove the fd smem driver and fd_smem node. > > + }; > > + > > + fd:fd@1502b000 { > > space after the : ^ will be fixed. > > + compatible = "mediatek,fd"; > > Should be SoC specific. > will be fixed as "mediatek, mt8183-fd". Thanks and Best Regards Jerry > > + mediatek,larb = <&larb5>; > > + mediatek,vpu = <&vpu>; > > + iommus = <&iommu M4U_PORT_CAM_FDVT_RP>, > > + <&iommu M4U_PORT_CAM_FDVT_WR>, > > + <&iommu M4U_PORT_CAM_FDVT_RB>; > > + reg = <0 0x1502b000 0 0x1000>; > > + interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_LOW>; > > + clocks = <&imgsys CLK_IMG_FDVT>; > > + clock-names = "FD_CLK_IMG_FD"; > > + smem_device = <&fd_smem>; > > + }; > > + > > vdecsys: syscon@16000000 { > > compatible = "mediatek,mt8183-vdecsys", "syscon"; > > reg = <0 0x16000000 0 0x1000>; > > -- > > 1.9.1 > >
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b3d8dfd..45c7e2f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -440,6 +440,26 @@ #clock-cells = <1>; }; + fd_smem: fd_smem { + compatible = "mediatek,fd_smem"; + mediatek,larb = <&larb5>; + iommus = <&iommu M4U_PORT_CAM_IMGI>; + }; + + fd:fd@1502b000 { + compatible = "mediatek,fd"; + mediatek,larb = <&larb5>; + mediatek,vpu = <&vpu>; + iommus = <&iommu M4U_PORT_CAM_FDVT_RP>, + <&iommu M4U_PORT_CAM_FDVT_WR>, + <&iommu M4U_PORT_CAM_FDVT_RB>; + reg = <0 0x1502b000 0 0x1000>; + interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_LOW>; + clocks = <&imgsys CLK_IMG_FDVT>; + clock-names = "FD_CLK_IMG_FD"; + smem_device = <&fd_smem>; + }; + vdecsys: syscon@16000000 { compatible = "mediatek,mt8183-vdecsys", "syscon"; reg = <0 0x16000000 0 0x1000>;
This patch adds nodes for Face Detection (FD) unit. FD is embedded in Mediatek SoCs and works with the co-processor to perform face detection on the input data and image and output detected face result. Signed-off-by: Jerry-ch Chen <jerry-ch.chen@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)