| Message ID | 20190405234514.6183-9-megous@megous.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for Orange Pi 3 | expand |
On Sat, Apr 06, 2019 at 01:45:10AM +0200, megous@megous.com wrote: > From: Ondrej Jirman <megous@megous.com> > > --- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > index 91fecab58836..dccad79da90c 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > @@ -238,6 +238,15 @@ > bias-pull-up; > }; > > + Extra line > + mmc1_pins: mmc1-pins { > + pins = "PG0", "PG1", "PG2", "PG3", > + "PG4", "PG5"; > + function = "mmc1"; > + drive-strength = <30>; > + bias-pull-up; > + }; > + Is that the only muxing option? If so, then it should be assigned by default to mmc1 Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
On Mon, Apr 08, 2019 at 09:43:27AM +0200, Maxime Ripard wrote: > On Sat, Apr 06, 2019 at 01:45:10AM +0200, megous@megous.com wrote: > > From: Ondrej Jirman <megous@megous.com> > > > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > index 91fecab58836..dccad79da90c 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > @@ -238,6 +238,15 @@ > > bias-pull-up; > > }; > > > > + > > Extra line > > > + mmc1_pins: mmc1-pins { > > + pins = "PG0", "PG1", "PG2", "PG3", > > + "PG4", "PG5"; > > + function = "mmc1"; > > + drive-strength = <30>; > > + bias-pull-up; > > + }; > > + > > Is that the only muxing option? I don't think so. I believe someone can use a 1-bit interface (bus-width = <1>), and then some data pins will be free. This pinconfig is for 4-bit bus width setup. Though other SoCs (ex. H3, A83T) don't consider this possibility and make the 4-bit config the default pinctrl for mmc1. To add to the confusion, on these SoCs 4-bit pinconf is the default, but 1bit bus-width is the (implicit) default. This led to some confusion in the past. So we can either: - keep consistency with what is done elsewhere, and make this default, despite not being the only option, - or perhaps I can rename this to mmc1_bus_width4_pins, or somesuch, to make it more explicit, and keep it non-default. What do you think is better? thank you and regards, o. > If so, then it should be assigned by default to mmc1 > > Thanks! > Maxime > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com
Hi, On Tue, Apr 09, 2019 at 12:41:05AM +0200, Ondřej Jirman wrote: > On Mon, Apr 08, 2019 at 09:43:27AM +0200, Maxime Ripard wrote: > > On Sat, Apr 06, 2019 at 01:45:10AM +0200, megous@megous.com wrote: > > > From: Ondrej Jirman <megous@megous.com> > > > > > > --- > > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > index 91fecab58836..dccad79da90c 100644 > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > > @@ -238,6 +238,15 @@ > > > bias-pull-up; > > > }; > > > > > > + > > > > Extra line > > > > > + mmc1_pins: mmc1-pins { > > > + pins = "PG0", "PG1", "PG2", "PG3", > > > + "PG4", "PG5"; > > > + function = "mmc1"; > > > + drive-strength = <30>; > > > + bias-pull-up; > > > + }; > > > + > > > > Is that the only muxing option? > > I don't think so. I believe someone can use a 1-bit interface (bus-width = <1>), > and then some data pins will be free. This pinconfig is for 4-bit bus width > setup. > > Though other SoCs (ex. H3, A83T) don't consider this possibility and make the > 4-bit config the default pinctrl for mmc1. To add to the confusion, on these > SoCs 4-bit pinconf is the default, but 1bit bus-width is the (implicit) default. > This led to some confusion in the past. > > So we can either: > - keep consistency with what is done elsewhere, and make this default, despite > not being the only option, What is done elsewhere is that if it's the only option, just call it $controller_pins and make that the default. If it isn't, then call it $(controller)_$(bank)_pins, and put it at the board level. If it's not the only muxing option, then your name should be called mmc1-pg-pins > - or perhaps I can rename this to mmc1_bus_width4_pins, or somesuch, to make it > more explicit, and keep it non-default. We haven't encountered a case where the 1-bit bus was actually used, so there's no need to take care of that. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 91fecab58836..dccad79da90c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -238,6 +238,15 @@ bias-pull-up; }; + + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + mmc2_pins: mmc2-pins { pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10",
From: Ondrej Jirman <megous@megous.com> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)