| Message ID | 20190312015019.30628-3-peng.ma@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v7,1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list | expand |
Hi axboe, If you have no comments on these paths, please merge. Thank you very much. Patch link: http://patchwork.ozlabs.org/patch/1055028/ http://patchwork.ozlabs.org/patch/1054189/ Best Regards, Peng >-----Original Message----- >From: Peng Ma <peng.ma@nxp.com> >Sent: 2019年3月12日 9:50 >To: axboe@kernel.dk; robh+dt@kernel.org; mark.rutland@arm.com; >shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Peng Ma ><peng.ma@nxp.com> >Subject: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >Lx2160a is a new introduced soc which supports ATA3.0 > >Signed-off-by: Peng Ma <peng.ma@nxp.com> >--- >changed for V7: > - no changed. > > drivers/ata/ahci_qoriq.c | 52 >+++++++++++++++++++++++++++++++--------------- > 1 files changed, 35 insertions(+), 17 deletions(-) > >diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c index >ce59253..08dbb86 100644 >--- a/drivers/ata/ahci_qoriq.c >+++ b/drivers/ata/ahci_qoriq.c >@@ -58,6 +58,7 @@ enum ahci_qoriq_type { > AHCI_LS1046A, > AHCI_LS1088A, > AHCI_LS2088A, >+ AHCI_LX2160A, > }; > > struct ahci_qoriq_priv { >@@ -67,6 +68,8 @@ struct ahci_qoriq_priv { > bool is_dmacoherent; > }; > >+static bool ecc_initialized; >+ > static const struct of_device_id ahci_qoriq_of_match[] = { > { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, > { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, @@ >-74,6 +77,7 @@ struct ahci_qoriq_priv { > { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, > { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A}, > { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A}, >+ { .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A}, > {}, > }; > MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match); @@ -165,9 +169,10 @@ >static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > > switch (qpriv->type) { > case AHCI_LS1021A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(SATA_ECC_DISABLE, qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(SATA_ECC_DISABLE, qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); > writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); @@ -180,10 >+185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > break; > > case AHCI_LS1043A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_ARMV8_CH2, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ >-202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv >*hpriv) > break; > > case AHCI_LS1046A: >- if (!qpriv->ecc_addr) >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_ARMV8_CH2, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ >-215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv >*hpriv) > break; > > case AHCI_LS1088A: >- if (!qpriv->ecc_addr) >+ case AHCI_LX2160A: >+ if (!(qpriv->ecc_addr || ecc_initialized)) > return -EINVAL; >- writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A, >- qpriv->ecc_addr); >+ else if (qpriv->ecc_addr && !ecc_initialized) >+ writel(readl(qpriv->ecc_addr) | >+ ECC_DIS_LS1088A, >+ qpriv->ecc_addr); > writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); > writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); > writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -237,6 >+249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) > break; > } > >+ ecc_initialized = true; > return 0; > } > >@@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device >*pdev) > > qoriq_priv->type = (enum ahci_qoriq_type)of_id->data; > >- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, >- "sata-ecc"); >- if (res) { >- qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res); >- if (IS_ERR(qoriq_priv->ecc_addr)) >- return PTR_ERR(qoriq_priv->ecc_addr); >+ if (unlikely(!ecc_initialized)) { >+ res = platform_get_resource_byname(pdev, >+ IORESOURCE_MEM, >+ "sata-ecc"); >+ if (res) { >+ qoriq_priv->ecc_addr = >+ devm_ioremap_resource(dev, res); >+ if (IS_ERR(qoriq_priv->ecc_addr)) >+ return PTR_ERR(qoriq_priv->ecc_addr); >+ } > } >+ > qoriq_priv->is_dmacoherent = of_dma_is_coherent(np); > > rc = ahci_platform_enable_resources(hpriv); >-- >1.7.1
On 4/8/19 4:06 AM, Peng Ma wrote: > Hi axboe, > > If you have no comments on these paths, please merge. > Thank you very much. > Patch link: > http://patchwork.ozlabs.org/patch/1055028/ > http://patchwork.ozlabs.org/patch/1054189/ Can you resend, it's not clear which is which here, and what parts of the series goes where.
Hi Axboe, Patch link: http://patchwork.ozlabs.org/patch/1055028/ http://patchwork.ozlabs.org/patch/1054189/ Best Regards, Peng >-----Original Message----- >From: Jens Axboe <axboe@kernel.dk> >Sent: 2019年4月8日 23:21 >To: Peng Ma <peng.ma@nxp.com>; robh+dt@kernel.org; >mark.rutland@arm.com; shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang ><andy.tang@nxp.com> >Subject: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >WARNING: This email was created outside of NXP. DO NOT CLICK links or >attachments unless you recognize the sender and know the content is safe. > > > >On 4/8/19 4:06 AM, Peng Ma wrote: >> Hi axboe, >> >> If you have no comments on these paths, please merge. >> Thank you very much. >> Patch link: >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch >> >work.ozlabs.org%2Fpatch%2F1055028%2F&data=02%7C01%7Cpeng.ma >%40nxp. >> >com%7C40e859676606431ce84908d6bc35bf3d%7C686ea1d3bc2b4c6fa92cd9 >9c5c301 >> >635%7C0%7C1%7C636903336364109322&sdata=Q8vElMkaDmHvphhVo >12BtFUvqXp >> T%2BDBrnvdjV%2FFizfs%3D&reserved=0 >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatch >> >work.ozlabs.org%2Fpatch%2F1054189%2F&data=02%7C01%7Cpeng.ma >%40nxp. >> >com%7C40e859676606431ce84908d6bc35bf3d%7C686ea1d3bc2b4c6fa92cd9 >9c5c301 >> >635%7C0%7C1%7C636903336364109322&sdata=HNuiGz%2BhfegcgNQ7 >T%2BPqGPI >> bS3ch%2FUqtxmHBfL6MoRo%3D&reserved=0 > >Can you resend, it's not clear which is which here, and what parts of the series >goes where. > >-- >Jens Axboe
On 4/9/19 12:44 AM, Peng Ma wrote: > Hi Axboe, > > Patch link: > > http://patchwork.ozlabs.org/patch/1055028/ > > http://patchwork.ozlabs.org/patch/1054189/ Applied, thanks.
Hi Axboe, Thanks very much. Best Regards, Peng >-----Original Message----- >From: Jens Axboe <axboe@kernel.dk> >Sent: 2019年4月9日 22:17 >To: Peng Ma <peng.ma@nxp.com>; robh+dt@kernel.org; >mark.rutland@arm.com; shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com> >Cc: linux-ide@vger.kernel.org; devicetree@vger.kernel.org; >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang ><andy.tang@nxp.com>; Jianchao Wang <jianchao.wang@nxp.com> >Subject: Re: [EXT] Re: [v7 3/3] ahci: qoriq: add lx2160 platforms support > >WARNING: This email was created outside of NXP. DO NOT CLICK links or >attachments unless you recognize the sender and know the content is safe. > > > >On 4/9/19 12:44 AM, Peng Ma wrote: >> Hi Axboe, >> >> Patch link: >> >> >https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchwo >rk.ozlabs.org%2Fpatch%2F1055028%2F&data=02%7C01%7Cpeng.ma%40 >nxp.com%7Ce76be539c24a4733cf3f08d6bcf618de%7C686ea1d3bc2b4c6fa92 >cd99c5c301635%7C0%7C1%7C636904162505501500&sdata=Am7QEJ2Y >sqkNLXUtIMXU%2Fs5Mt4QhzYYa1FjbhWaAXiw%3D&reserved=0 >> >> >https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchwo >rk.ozlabs.org%2Fpatch%2F1054189%2F&data=02%7C01%7Cpeng.ma%40 >nxp.com%7Ce76be539c24a4733cf3f08d6bcf618de%7C686ea1d3bc2b4c6fa92 >cd99c5c301635%7C0%7C1%7C636904162505501500&sdata=ikpNC4M% >2BDq3%2FPYsXLHbPDcDu2KfgIRXs%2BjDDXWtp2jk%3D&reserved=0 > >Applied, thanks. > >-- >Jens Axboe
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c index ce59253..08dbb86 100644 --- a/drivers/ata/ahci_qoriq.c +++ b/drivers/ata/ahci_qoriq.c @@ -58,6 +58,7 @@ enum ahci_qoriq_type { AHCI_LS1046A, AHCI_LS1088A, AHCI_LS2088A, + AHCI_LX2160A, }; struct ahci_qoriq_priv { @@ -67,6 +68,8 @@ struct ahci_qoriq_priv { bool is_dmacoherent; }; +static bool ecc_initialized; + static const struct of_device_id ahci_qoriq_of_match[] = { { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, @@ -74,6 +77,7 @@ struct ahci_qoriq_priv { { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A}, { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A}, + { .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A}, {}, }; MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match); @@ -165,9 +169,10 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) switch (qpriv->type) { case AHCI_LS1021A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(SATA_ECC_DISABLE, qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(SATA_ECC_DISABLE, qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); @@ -180,10 +185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1043A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_ARMV8_CH2, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1046A: - if (!qpriv->ecc_addr) + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_ARMV8_CH2, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; case AHCI_LS1088A: - if (!qpriv->ecc_addr) + case AHCI_LX2160A: + if (!(qpriv->ecc_addr || ecc_initialized)) return -EINVAL; - writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A, - qpriv->ecc_addr); + else if (qpriv->ecc_addr && !ecc_initialized) + writel(readl(qpriv->ecc_addr) | + ECC_DIS_LS1088A, + qpriv->ecc_addr); writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); @@ -237,6 +249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) break; } + ecc_initialized = true; return 0; } @@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device *pdev) qoriq_priv->type = (enum ahci_qoriq_type)of_id->data; - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "sata-ecc"); - if (res) { - qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res); - if (IS_ERR(qoriq_priv->ecc_addr)) - return PTR_ERR(qoriq_priv->ecc_addr); + if (unlikely(!ecc_initialized)) { + res = platform_get_resource_byname(pdev, + IORESOURCE_MEM, + "sata-ecc"); + if (res) { + qoriq_priv->ecc_addr = + devm_ioremap_resource(dev, res); + if (IS_ERR(qoriq_priv->ecc_addr)) + return PTR_ERR(qoriq_priv->ecc_addr); + } } + qoriq_priv->is_dmacoherent = of_dma_is_coherent(np); rc = ahci_platform_enable_resources(hpriv);
Lx2160a is a new introduced soc which supports ATA3.0 Signed-off-by: Peng Ma <peng.ma@nxp.com> --- changed for V7: - no changed. drivers/ata/ahci_qoriq.c | 52 +++++++++++++++++++++++++++++++--------------- 1 files changed, 35 insertions(+), 17 deletions(-)