[PULL] drm-intel-next

Hi Dave & Daniel, A bag of Icelake fixes still. As the biggest thing software frequency control was found out to be ineffective due to register change. We've got GEM_BUSY regression fix (noticed by media folks) and reset handling improvements. For display there's the HDR work and plenty of clocking, gamma and CSC fixes. Nothing too critical outside Icelake. Most of the stuff is fixes to corner cases found by the CI, which is a good trend. This also includes the GVT pull with async/sync display flip handling and changes to make the i915 changes in this kernel work in the VM, too. Best Regards, Joonas *** drm-intel-next-2019-04-17: UAPI Changes: - uAPI "Fixes:" patch for the upcoming kernel 5.1, included here too We have an Ack from the media folks (only current user) for this late tweak Cross-subsystem Changes: - ALSA: hda: Fix racy display power access (Takashi, Chris) Driver Changes: - DDI and MIPI-DSI clocks fixes for Icelake (Vandita) - Fix Icelake frequency change/locking (RPS) (Mika) - Temporarily disable ppGTT read-only bit on Icelake (Mika) - Add missing Icelake W/As (Mika) - Enable 12 deep CSB status FIFO on Icelake (Mika) - Inherit more Icelake code for Elkhartlake (Bob, Jani) - Regression fix for GEM_BUSY causing us to report a mixed uabi-class request as not busy (Chris) - Handle catastrophic error on engine reset (Mika) - Shortcut readiness to reset check (Mika) - Revert back to max link rate and lane count on eDP (Jani) - Fix pipe BPP readout for BXT/GLK DSI (Ville) - Set DP min_bpp to 8*3 for non-RGB output formats (Ville) - Enable coarse preemption boundaries for Gen8 (Chris) - Do not enable FEC without DSC (Ville) - Restore correct BXT DDI latency optim setting calculation (Ville) - Always reset context's RING registers to avoid running workload twice during reset (Chris) - Set GPU wedged on driver unload (Janusz) - Consolidate two similar barries from timeline into one (Chris) - Only reset the pinned kernel contexts on resume (Chris) - Wakeref tracking improvements (Chris, Imre) - Lockdep fixes for shrinker interactions (Chris) - Bump ready tasks ahead of busywaits in prep of semaphore use (Chris) - Huge step in splitting display code into fine grained files (Jani) - Refactor the IRQ init/reset macros for code saving (Paulo) - Convert IRQ initialization code to uncore MMIO access (Paulo) - Convert workarounds code to use uncore MMIO access (Chris) - Nuke drm_crtc_state and use intel_atomic_state instead (Manasi) - Update SKL clock-gating WA (Radhakrishna, Ville) - Isolate GuC reset code flow (Chris) - Expose force_dsc_enable through debugfs (Manasi) - Header standalone compile testing framework (Jani) - Code cleanups to reduce driver footprint (Chris) - PSR code fixes and cleanups (Jose) - Sparse and kerneldoc updates (Chris) - Suppress spurious combo PHY B warning (Vile) drm-intel-next-2019-04-04: Cross-subsystem Changes: - Add Elkhartlake (Gen11) stolen memory early quirks (Rodrigo) Driver Changes: - Mark all Elkhartlake ports as combo phys (Bob) - Enable 10bit gamma for Ivybridge and newer platforms (Ville) - Expose the legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props on gen2/3 (Ville) - Skip modeset for cdclk changes if possible (Ville, Abhay, Imre) - Force 2*96 MHz cdclk on Geminilake/Cannonlake when audio power is enabled (Ville) - Modularize and correct gamma/degamma/CSC code per platform (Ville) - Fix gamma register programming (Uma) - Avoid drm_modeset_lock() deadlock splat (Chris) - Check cache domains for userptr on release (Chris) - Avoid deadlock if we pwrite into mmap'd region (Chris) - Only emit one semaphore per request to avoid exhausting ringbuf (Chris) - Continue to clean up the uncore code (Daniele) - Introduce sub-platform concept to organize code (Tvrtko) - Header splitting untangling (Chris) - Avoid using ctx->file_priv during construction (Chris) - GuC code improvements (Robert) The following changes since commit a01b2c6f47d86c7d1a9fa822b3b91ec233b61784: drm/i915: Update DRIVER_DATE to 20190328 (2019-03-28 14:41:55 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-04-17 for you to fetch changes up to ad2c467aa92e283e9e8009bb9eb29a5c6a2d1217: drm/i915: Update DRIVER_DATE to 20190417 (2019-04-17 12:07:47 +0300) ---------------------------------------------------------------- UAPI Changes: - uAPI "Fixes:" patch for the upcoming kernel 5.1, included here too We have an Ack from the media folks (only current user) for this late tweak Cross-subsystem Changes: - ALSA: hda: Fix racy display power access (Takashi, Chris) Driver Changes: - DDI and MIPI-DSI clocks fixes for Icelake (Vandita) - Fix Icelake frequency change/locking (RPS) (Mika) - Temporarily disable ppGTT read-only bit on Icelake (Mika) - Add missing Icelake W/As (Mika) - Enable 12 deep CSB status FIFO on Icelake (Mika) - Inherit more Icelake code for Elkhartlake (Bob, Jani) - Handle catastrophic error on engine reset (Mika) - Shortcut readiness to reset check (Mika) - Regression fix for GEM_BUSY causing us to report a mixed uabi-class request as not busy (Chris) - Revert back to max link rate and lane count on eDP (Jani) - Fix pipe BPP readout for BXT/GLK DSI (Ville) - Set DP min_bpp to 8*3 for non-RGB output formats (Ville) - Enable coarse preemption boundaries for Gen8 (Chris) - Do not enable FEC without DSC (Ville) - Restore correct BXT DDI latency optim setting calculation (Ville) - Always reset context's RING registers to avoid running workload twice during reset (Chris) - Set GPU wedged on driver unload (Janusz) - Consolidate two similar barries from timeline into one (Chris) - Only reset the pinned kernel contexts on resume (Chris) - Wakeref tracking improvements (Chris, Imre) - Lockdep fixes for shrinker interactions (Chris) - Bump ready tasks ahead of busywaits in prep of semaphore use (Chris) - Huge step in splitting display code into fine grained files (Jani) - Refactor the IRQ init/reset macros for code saving (Paulo) - Convert IRQ initialization code to uncore MMIO access (Paulo) - Convert workarounds code to use uncore MMIO access (Chris) - Nuke drm_crtc_state and use intel_atomic_state instead (Manasi) - Update SKL clock-gating WA (Radhakrishna, Ville) - Isolate GuC reset code flow (Chris) - Expose force_dsc_enable through debugfs (Manasi) - Header standalone compile testing framework (Jani) - Code cleanups to reduce driver footprint (Chris) - PSR code fixes and cleanups (Jose) - Sparse and kerneldoc updates (Chris) - Suppress spurious combo PHY B warning (Vile) ---------------------------------------------------------------- Bob Paauwe (2): drm/i915/ehl: All EHL ports are combo phys drm/i915/ehl: Inherit Ice Lake conditional code Chris Wilson (34): drm/i915: Always backoff after a drm_modeset_lock() deadlock drm/i915: Avoid using ctx->file_priv during construction drm/i915: Check domains for userptr on release drm/i915: Prefault before locking pages in shmem_pwrite drm/i915: Move intel_engine_mask_t around for use by i915_request_types.h drm/i915: Split out i915_priolist_types into its own header drm/i915: Only emit one semaphore per request drm/i915: Move the decision to use the breadcrumb tasklet to the backend drm/i915: Be precise in types for i915_gem_busy drm/i915: Fixup kerneldoc for intel_cdclk_needs_cd2x_update drm/i915: Use lockdep_pin_lock() over the construction of the request drm/i915/execlists: Enable coarse preemption boundaries for gen8 drm/i915/selftests: Fix plain use of integer 0 as NULL drm/i915: Make RING_PDP relative to engine->mmio_base drm/i915: Make use of 'engine->uncore' drm/i915: Convert i915_reset.c over to using uncore mmio drm/i915: Track the temporary wakerefs used for hsw_get_pipe_config drm/i915/guc: Replace WARN with a DRM_ERROR drm/i915: Use static allocation for i915_globals_park() drm/i915: Consolidate the timeline->barrier drm/i915/selftests: Mark live_forcewake_ops as unreliable drm/i915/guc: Replace preempt_client lookup with engine->preempt_context drm/i915: Only reset the pinned kernel contexts on resume drm/i915: Bump ready tasks ahead of busywaits drm/i915: Call i915_sw_fence_fini on request cleanup drm/i915/guc: Implement reset locally drm/i915/execlists: Always reset the context's RING registers drm/i915: Avoid reclaim taints from runtime-pm debug drm/i915: Flush the CSB pointer reset drm/i915: Teach intel_workarounds to use uncore mmio access drm/i915/selftests: Skip live timeline/suspend tests if wedged drm/i915: Drop bool return from breadcrumbs signaler drm/i915: Mark up ips for RCU protection drm/i915: Introduce struct class_instance for engines across the uAPI Colin Xu (5): drm/i915/gvt: Use consist max display pipe numbers as i915 definition drm/i915/gvt: Add macro define for mmio 0x50080 and gvt flip event drm/i915/gvt: Enable synchronous flip on handling MI_DISPLAY_FLIP drm/i915/gvt: Enable async flip on plane surface mmio writes drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list Daniele Ceraolo Spurio (4): drm/i915: move the edram detection out of uncore init drm/i915: fix i9xx irq enable/disable drm/i915: add intel_uncore_init_early drm/i915: rename init/fini/prune uncore functions Imre Deak (4): drm/i915: Save the old CDCLK atomic state drm/i915: Remove redundant store of logical CDCLK state drm/i915: Get power refs in encoder->get_power_domains() drm/i915/icl: Simplify release of encoder power refs Jani Nikula (28): drm/i915: add Makefile magic for testing headers are self-contained drm/i915: make intel_frontbuffer.h self-contained drm/i915: extract intel_audio.h from intel_drv.h drm/i915: extract intel_crt.h from intel_drv.h drm/i915: extract intel_ddi.h from intel_drv.h drm/i915: extract intel_connector.h from intel_drv.h drm/i915: extract intel_csr.h from intel_drv.h drm/i915: extract intel_fbc.h from intel_drv.h drm/i915: extract intel_psr.h from intel_drv.h drm/i915: extract intel_color.h from intel_drv.h drm/i915: extract intel_lspcon.h from intel_drv.h drm/i915: extract intel_sdvo.h from intel_drv.h drm/i915: extract intel_hdcp.h from intel_drv.h drm/i915: extract intel_panel.h from intel_drv.h drm/i915: extract intel_pm.h from intel_drv.h drm/i915: extract intel_fbdev.h from intel_drv.h drm/i915: extract intel_dp.h from intel_drv.h drm/i915: extract intel_hdmi.h from intel_drv.h drm/i915: extract intel_atomic_plane.h from intel_drv.h drm/i915: extract intel_pipe_crc.h from intel_drv.h drm/i915: extract intel_tv.h from intel_drv.h drm/i915: extract intel_lvds.h from intel_drv.h drm/i915: extract intel_dvo.h from intel_drv.h drm/i915: extract intel_sprite.h from intel_drv.h drm/i915: extract intel_cdclk.h from intel_drv.h drm/i915/cdclk: have only one init/uninit function drm/i915/dp: revert back to max link rate and lane count on eDP drm/i915/ehl: inherit icl cdclk init/uninit Janusz Krzysztofik (1): drm/i915: Mark GEM wedged right after marking device unplugged Joonas Lahtinen (3): drm/i915: Update DRIVER_DATE to 20190404 Merge tag 'gvt-next-2019-04-16' of https://github.com/intel/gvt-linux into drm-intel-next-queued drm/i915: Update DRIVER_DATE to 20190417 José Roberto de Souza (4): drm/i915/psr: Update PSR2 SU corruption workaround comment drm/i915: Remove unused VLV/CHV PSR registers drm/i915/psr: Initialize PSR mutex even when sink is not reliable drm/i915/psr: Do not enable PSR in interlaced mode for all GENs Manasi Navare (2): drm/i915/dp: Expose force_dsc_enable through debugfs drm/i915: Nuke drm_crtc_state and use intel_atomic_state instead Mika Kuoppala (12): drm/i915/icl: Handle rps interrupts without irq lock drm/i915/icl: Don't warn on spurious interrupts drm/i915: Use dedicated rc6 enabling sequence for gen11 drm/i915/icl: Apply a recommended rc6 threshold drm/i915/icl: Enable media sampler powergate drm/i915/icl: Disable video turbo mode for rp control drm/i915: Use Engine1 instance for gen11 pm interrupts drm/i915: Prepare for larger CSB status FIFO size drm/i915/icl: Switch to using 12 deep CSB status FIFO drm/i915: Disable read only ppgtt support for gen11 drm/i915: Shortcut readiness to reset check drm/i915: Handle catastrophic error on engine reset Paulo Zanoni (5): drm/i915: refactor the IRQ init/reset macros drm/i915: don't specify the IRQ register in the gen2 macros drm/i915: add GEN2_ prefix to the I{E, I, M, S}R registers drm/i915: convert the IRQ initialization functions to intel_uncore drm/i915: fully convert the IRQ initialization macros to intel_uncore Radhakrishna Sripada (2): drm/i915: Rename skl_wa_clkgating to the actual WA drm/i915: Fix the inconsistent RMW in WA 827 Robert M. Fosha (1): drm/i915/guc: Retry GuC load for all load failures Rodrigo Vivi (1): x86/gpu: add ElkhartLake to gen11 early quirks Takashi Iwai (1): ALSA: hda: Fix racy display power access Tvrtko Ursulin (5): drm/i915: Split Pineview device info into desktop and mobile drm/i915: Remove redundant device id from IS_IRONLAKE_M macro drm/i915: Split some PCI ids into separate groups drm/i915: Introduce concept of a sub-platform drm/i915: Fix uninitialized mask in intel_device_info_subplatform_init Uma Shankar (2): drm/i915: Fix GCMAX color register programming drm/i915: Program EXT2 GC MAX registers Vandita Kulkarni (2): drm/i915/icl: Ungate ddi clocks before IO enable drm/i915/icl: Fix port disable sequence for mipi-dsi Ville Syrjälä (25): drm/i915: Extract check_luts() drm/i915: Turn intel_color_check() into a vfunc drm/i915: Extract i9xx_color_check() drm/i915: Extract chv_color_check() drm/i915: Extract icl_color_check() drm/i915: Extract glk_color_check() drm/i915: Extract bdw_color_check() drm/i915: Extract ilk_color_check() drm/i915: Drop the pointless linear legacy LUT load on CHV drm/i915: Skip the linear degamma LUT load on ICL+ drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled drm/i915: Skip modeset for cdclk changes if possible drm/i915: Extract ilk_lut_10() drm/i915: Don't use split gamma when we don't have to drm/i915: Implement split/10bit gamma for ivb/hsw drm/i915: Add 10bit LUT for ilk/snb drm/i915: Add "10.6" LUT mode for i965+ drm/i915: Expose the legacy LUT via the GAMMA_LUT/GAMMA_LUT_SIZE props on gen2/3 drm/i915: Expose full 1024 LUT entries on ivb+ drm/i915: Fix pipe_bpp readout for BXT/GLK DSI drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats drm/i915: Clean up DSC vs. not bpp handling drm/i915: Do not enable FEC without DSC drm/i915: Restore correct bxt_ddi_phy_calc_lane_lat_optim_mask() calculation drm/i915: Suppress spurious combo PHY B warning Xiaolin Zhang (2): drm/i915/gvt: replaced register address with name drm/i915/gvt: addressed guest GPU hang with HWS index mode Yan Zhao (1): drm/i915/gvt: remove the unused sreg Zhao Yakui (2): drm/i915/gvt: Refine the snapshort range of I915 MCHBAR to optimize gvt-g boot time drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory Zhenyu Wang (1): Merge tag 'drm-intel-next-2019-04-04' into gvt-next arch/x86/kernel/early-quirks.c | 4 +- drivers/gpu/drm/i915/.gitignore | 1 + drivers/gpu/drm/i915/Makefile | 14 +- drivers/gpu/drm/i915/Makefile.header-test | 47 ++ drivers/gpu/drm/i915/gvt/cmd_parser.c | 30 +- drivers/gpu/drm/i915/gvt/display.c | 1 - drivers/gpu/drm/i915/gvt/execlist.c | 11 +- drivers/gpu/drm/i915/gvt/execlist.h | 2 +- drivers/gpu/drm/i915/gvt/gtt.c | 7 + drivers/gpu/drm/i915/gvt/gtt.h | 2 +- drivers/gpu/drm/i915/gvt/gvt.h | 17 +- drivers/gpu/drm/i915/gvt/handlers.c | 161 +++-- drivers/gpu/drm/i915/gvt/mmio.c | 8 +- drivers/gpu/drm/i915/gvt/mmio_context.c | 4 +- drivers/gpu/drm/i915/gvt/reg.h | 34 + drivers/gpu/drm/i915/gvt/scheduler.c | 8 +- drivers/gpu/drm/i915/gvt/scheduler.h | 6 +- drivers/gpu/drm/i915/gvt/vgpu.c | 4 +- drivers/gpu/drm/i915/i915_debugfs.c | 32 +- drivers/gpu/drm/i915/i915_drv.c | 79 ++- drivers/gpu/drm/i915/i915_drv.h | 166 +++-- drivers/gpu/drm/i915/i915_gem.c | 62 +- drivers/gpu/drm/i915/i915_gem.h | 2 - drivers/gpu/drm/i915/i915_gem_context.c | 57 +- drivers/gpu/drm/i915/i915_gem_context.h | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 11 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +- drivers/gpu/drm/i915/i915_gem_object.h | 4 + drivers/gpu/drm/i915/i915_gem_userptr.c | 4 +- drivers/gpu/drm/i915/i915_globals.c | 74 +-- drivers/gpu/drm/i915/i915_gpu_error.c | 31 +- drivers/gpu/drm/i915/i915_gpu_error.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 396 ++++++----- drivers/gpu/drm/i915/i915_pci.c | 38 +- drivers/gpu/drm/i915/i915_priolist_types.h | 42 ++ drivers/gpu/drm/i915/i915_reg.h | 80 +-- drivers/gpu/drm/i915/i915_request.c | 69 +- drivers/gpu/drm/i915/i915_request.h | 11 + drivers/gpu/drm/i915/i915_reset.c | 222 ++++--- drivers/gpu/drm/i915/i915_reset.h | 10 +- drivers/gpu/drm/i915/i915_scheduler.c | 26 +- drivers/gpu/drm/i915/i915_scheduler.h | 86 +-- drivers/gpu/drm/i915/i915_scheduler_types.h | 72 ++ drivers/gpu/drm/i915/i915_suspend.c | 4 +- drivers/gpu/drm/i915/i915_timeline.c | 2 - drivers/gpu/drm/i915/i915_timeline.h | 16 +- drivers/gpu/drm/i915/i915_timeline_types.h | 13 +- drivers/gpu/drm/i915/icl_dsi.c | 66 +- drivers/gpu/drm/i915/intel_atomic.c | 2 + drivers/gpu/drm/i915/intel_atomic_plane.c | 3 + drivers/gpu/drm/i915/intel_atomic_plane.h | 40 ++ drivers/gpu/drm/i915/intel_audio.c | 76 ++- drivers/gpu/drm/i915/intel_audio.h | 24 + drivers/gpu/drm/i915/intel_breadcrumbs.c | 14 +- drivers/gpu/drm/i915/intel_cdclk.c | 307 +++++---- drivers/gpu/drm/i915/intel_cdclk.h | 46 ++ drivers/gpu/drm/i915/intel_color.c | 734 ++++++++++++++++----- drivers/gpu/drm/i915/intel_color.h | 17 + drivers/gpu/drm/i915/intel_combo_phy.c | 3 +- drivers/gpu/drm/i915/intel_connector.c | 9 +- drivers/gpu/drm/i915/intel_connector.h | 35 + drivers/gpu/drm/i915/intel_context_types.h | 1 + drivers/gpu/drm/i915/intel_crt.c | 7 +- drivers/gpu/drm/i915/intel_crt.h | 21 + drivers/gpu/drm/i915/intel_csr.c | 3 + drivers/gpu/drm/i915/intel_csr.h | 17 + drivers/gpu/drm/i915/intel_ddi.c | 39 +- drivers/gpu/drm/i915/intel_ddi.h | 53 ++ drivers/gpu/drm/i915/intel_device_info.c | 93 +++ drivers/gpu/drm/i915/intel_device_info.h | 30 +- drivers/gpu/drm/i915/intel_display.c | 210 ++++-- drivers/gpu/drm/i915/intel_dp.c | 132 ++-- drivers/gpu/drm/i915/intel_dp.h | 122 ++++ drivers/gpu/drm/i915/intel_dp_link_training.c | 1 + drivers/gpu/drm/i915/intel_dp_mst.c | 11 +- drivers/gpu/drm/i915/intel_dpio_phy.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 584 +--------------- drivers/gpu/drm/i915/intel_dvo.c | 10 +- drivers/gpu/drm/i915/intel_dvo.h | 13 + drivers/gpu/drm/i915/intel_engine_cs.c | 53 +- drivers/gpu/drm/i915/intel_engine_types.h | 23 +- drivers/gpu/drm/i915/intel_fbc.c | 4 +- drivers/gpu/drm/i915/intel_fbc.h | 42 ++ drivers/gpu/drm/i915/intel_fbdev.c | 17 +- drivers/gpu/drm/i915/intel_fbdev.h | 53 ++ drivers/gpu/drm/i915/intel_fifo_underrun.c | 1 + drivers/gpu/drm/i915/intel_frontbuffer.c | 5 +- drivers/gpu/drm/i915/intel_frontbuffer.h | 10 + drivers/gpu/drm/i915/intel_guc_submission.c | 113 +++- drivers/gpu/drm/i915/intel_guc_submission.h | 1 + drivers/gpu/drm/i915/intel_hangcheck.c | 2 +- drivers/gpu/drm/i915/intel_hdcp.c | 10 +- drivers/gpu/drm/i915/intel_hdcp.h | 33 + drivers/gpu/drm/i915/intel_hdmi.c | 17 +- drivers/gpu/drm/i915/intel_hdmi.h | 51 ++ drivers/gpu/drm/i915/intel_lrc.c | 417 +++++++----- drivers/gpu/drm/i915/intel_lrc.h | 19 +- drivers/gpu/drm/i915/intel_lspcon.c | 6 +- drivers/gpu/drm/i915/intel_lspcon.h | 38 ++ drivers/gpu/drm/i915/intel_lvds.c | 9 +- drivers/gpu/drm/i915/intel_lvds.h | 22 + drivers/gpu/drm/i915/intel_opregion.c | 3 +- drivers/gpu/drm/i915/intel_overlay.c | 4 +- drivers/gpu/drm/i915/intel_panel.c | 3 + drivers/gpu/drm/i915/intel_panel.h | 65 ++ drivers/gpu/drm/i915/intel_pipe_crc.c | 4 +- drivers/gpu/drm/i915/intel_pipe_crc.h | 35 + drivers/gpu/drm/i915/intel_pm.c | 95 ++- drivers/gpu/drm/i915/intel_pm.h | 71 ++ drivers/gpu/drm/i915/intel_psr.c | 25 +- drivers/gpu/drm/i915/intel_psr.h | 40 ++ drivers/gpu/drm/i915/intel_ringbuffer.c | 31 +- drivers/gpu/drm/i915/intel_ringbuffer.h | 9 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 34 +- drivers/gpu/drm/i915/intel_sdvo.c | 13 +- drivers/gpu/drm/i915/intel_sdvo.h | 23 + drivers/gpu/drm/i915/intel_sprite.c | 16 +- drivers/gpu/drm/i915/intel_sprite.h | 55 ++ drivers/gpu/drm/i915/intel_tv.c | 5 +- drivers/gpu/drm/i915/intel_tv.h | 13 + drivers/gpu/drm/i915/intel_uc.c | 2 +- drivers/gpu/drm/i915/intel_uncore.c | 65 +- drivers/gpu/drm/i915/intel_uncore.h | 31 +- drivers/gpu/drm/i915/intel_workarounds.c | 73 +- drivers/gpu/drm/i915/intel_workarounds.h | 6 +- drivers/gpu/drm/i915/selftests/i915_gem.c | 3 + drivers/gpu/drm/i915/selftests/i915_gem_context.c | 8 +- drivers/gpu/drm/i915/selftests/i915_timeline.c | 3 + drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 3 +- drivers/gpu/drm/i915/selftests/intel_lrc.c | 180 +++++ drivers/gpu/drm/i915/selftests/intel_uncore.c | 11 + drivers/gpu/drm/i915/selftests/intel_workarounds.c | 5 +- drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 - .../drm/i915/test_i915_active_types_standalone.c | 7 - .../i915/test_i915_gem_context_types_standalone.c | 7 - .../drm/i915/test_i915_timeline_types_standalone.c | 7 - .../drm/i915/test_intel_context_types_standalone.c | 7 - .../drm/i915/test_intel_engine_types_standalone.c | 7 - .../i915/test_intel_workarounds_types_standalone.c | 7 - drivers/gpu/drm/i915/vlv_dsi.c | 34 +- include/drm/i915_pciids.h | 179 +++-- include/uapi/drm/i915_drm.h | 15 +- sound/hda/ext/hdac_ext_bus.c | 1 - sound/hda/hdac_bus.c | 1 + sound/hda/hdac_component.c | 6 +- 145 files changed, 4518 insertions(+), 2341 deletions(-) create mode 100644 drivers/gpu/drm/i915/.gitignore create mode 100644 drivers/gpu/drm/i915/Makefile.header-test create mode 100644 drivers/gpu/drm/i915/i915_priolist_types.h create mode 100644 drivers/gpu/drm/i915/i915_scheduler_types.h create mode 100644 drivers/gpu/drm/i915/intel_atomic_plane.h create mode 100644 drivers/gpu/drm/i915/intel_audio.h create mode 100644 drivers/gpu/drm/i915/intel_cdclk.h create mode 100644 drivers/gpu/drm/i915/intel_color.h create mode 100644 drivers/gpu/drm/i915/intel_connector.h create mode 100644 drivers/gpu/drm/i915/intel_crt.h create mode 100644 drivers/gpu/drm/i915/intel_csr.h create mode 100644 drivers/gpu/drm/i915/intel_ddi.h create mode 100644 drivers/gpu/drm/i915/intel_dp.h create mode 100644 drivers/gpu/drm/i915/intel_dvo.h create mode 100644 drivers/gpu/drm/i915/intel_fbc.h create mode 100644 drivers/gpu/drm/i915/intel_fbdev.h create mode 100644 drivers/gpu/drm/i915/intel_hdcp.h create mode 100644 drivers/gpu/drm/i915/intel_hdmi.h create mode 100644 drivers/gpu/drm/i915/intel_lspcon.h create mode 100644 drivers/gpu/drm/i915/intel_lvds.h create mode 100644 drivers/gpu/drm/i915/intel_panel.h create mode 100644 drivers/gpu/drm/i915/intel_pipe_crc.h create mode 100644 drivers/gpu/drm/i915/intel_pm.h create mode 100644 drivers/gpu/drm/i915/intel_psr.h create mode 100644 drivers/gpu/drm/i915/intel_sdvo.h create mode 100644 drivers/gpu/drm/i915/intel_sprite.h create mode 100644 drivers/gpu/drm/i915/intel_tv.h delete mode 100644 drivers/gpu/drm/i915/test_i915_active_types_standalone.c delete mode 100644 drivers/gpu/drm/i915/test_i915_gem_context_types_standalone.c delete mode 100644 drivers/gpu/drm/i915/test_i915_timeline_types_standalone.c delete mode 100644 drivers/gpu/drm/i915/test_intel_context_types_standalone.c delete mode 100644 drivers/gpu/drm/i915/test_intel_engine_types_standalone.c delete mode 100644 drivers/gpu/drm/i915/test_intel_workarounds_types_standalone.c

Message ID	20190418080426.GA6409@jlahtine-desk.ger.corp.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <dri-devel-bounces@lists.freedesktop.org> Date: Thu, 18 Apr 2019 11:04:26 +0300 From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> To: Dave Airlie <airlied@gmail.com>, Daniel Vetter <daniel.vetter@ffwll.ch> Subject: [PULL] drm-intel-next Message-ID: <20190418080426.GA6409@jlahtine-desk.ger.corp.intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.11.3 (2019-02-01) Precedence: list Cc: dim-tools@lists.freedesktop.org, Maxime Ripard <maxime.ripard@bootlin.com>, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>, Sean Paul <sean@poorly.run> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" <dri-devel-bounces@lists.freedesktop.org>
Series	[PULL] drm-intel-next \| expand [PULL] drm-intel-next

[PULL] drm-intel-next

Pull-request

Message

Comments